linux-dev/drivers/phy/lantiq, branch master

phy: lantiq: rcu-usb2: wait after clock enable

2021-01-13T13:59:03Z

Commit 65dc2e725286 ("usb: dwc2: Update Core Reset programming flow.") revealed that the phy isn't ready immediately after enabling it's clocks. The dwc2_check_core_version() fails and the dwc2 usb driver errors out. Add a short delay to let the phy get up and running. There isn't any documentation how much time is required, the value was chosen based on tests. Signed-off-by: Mathias Kresin Acked-by: Hauke Mehrtens Acked-by: Martin Blumenstingl Cc: # v5.7+ Link: https://lore.kernel.org/r/20210107224901.2102479-1-dev@kresin.me Signed-off-by: Vinod Koul

phy: lantiq: convert to devm_platform_ioremap_resource

2020-11-16T07:17:47Z

Use devm_platform_ioremap_resource to simplify code Signed-off-by: Chunfeng Yun Link: https://lore.kernel.org/r/1604642930-29019-6-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul

phy: lantiq: vrx200-pcie: Constify ltq_vrx200_pcie_phy_ops

2020-08-31T09:06:37Z

The only usage is to pass its address to devm_phy_create() which takes a const pointer. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn Acked-by: Martin Blumenstingl Link: https://lore.kernel.org/r/20200823220025.17588-6-rikard.falkeborn@gmail.com Signed-off-by: Vinod Koul

phy: lantiq: rcu-usb2: Constify ltq_rcu_usb2_phy_ops

2020-08-31T09:06:37Z

The only usage is to pass its address to devm_phy_create() which takes a const pointer. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn Link: https://lore.kernel.org/r/20200823220025.17588-5-rikard.falkeborn@gmail.com Signed-off-by: Vinod Koul

phy: lantiq: vrx200-pcie: Remove unneeded semicolon

2020-01-08T07:28:06Z

Fixes coccicheck warning: drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c:389:2-3: Unneeded semicolon Fixes: e52a632195bf ("phy: lantiq: vrx200-pcie: add a driver for the Lantiq VRX200 PCIe PHY") Reported-by: Hulk Robot Signed-off-by: Ma Feng Signed-off-by: Kishon Vijay Abraham I

phy: lantiq: vrx200-pcie: fix error return code in ltq_vrx200_pcie_phy_power_on()

2019-10-31T11:24:01Z

Fix to return a negative error code from the error handling case instead of 0, as done elsewhere in this function. Fixes: e52a632195bf ("phy: lantiq: vrx200-pcie: add a driver for the Lantiq VRX200 PCIe PHY") Signed-off-by: Wei Yongjun Reviewed-by: Martin Blumenstingl Signed-off-by: Kishon Vijay Abraham I

phy: lantiq: vrx200-pcie: add a driver for the Lantiq VRX200 PCIe PHY

2019-08-23T04:10:48Z

The Lantiq VRX200 SoCs embed a PCIe PHY in the "sram" bus. Unlike most other IP blocks on this SoC the register values are only 16-bit wide. Like other IP blocks on this SoC the register values are in big endian. The PHY embeds a PLL which can be configured in various modes. Only the 36MHz mode is supported for now, the other modes can be implemented when there's a board which actually needs them. OpenWrt uses the out-of-tree vendor driver and all supported boards there only need the 36MHz mode. There are two input clocks: - the "pdi" clock enables the register access - the "phy" clock is the clock input and enables the internal PLL There are two reset lines: - "phy" resets the PHY itself - the "pcie" reset line is shared between the PHY and the PCIe controller While the VRX200 SoC has only one PCIe controller and PHY the ARX300 uses two identical PCIe controllers and PHYs which are compatible with the PCIe controller and PHY on VRX200. Add a driver for this PHY so PCIe support can be enabled on these SoCs. Signed-off-by: Martin Blumenstingl Signed-off-by: Kishon Vijay Abraham I

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500

2019-06-19T15:09:55Z

Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Enrico Weigelt Reviewed-by: Kate Stewart Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman

treewide: Add SPDX license identifier - Makefile/Kconfig

2019-05-21T08:50:46Z

Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner Signed-off-by: Greg Kroah-Hartman

phy: lantiq: Fix compile warning

2018-09-26T07:39:39Z

This local variable is unused, remove it. Fixes: dea54fbad332 ("phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module") Signed-off-by: Hauke Mehrtens Signed-off-by: Kishon Vijay Abraham I