<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/phy/qualcomm, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/phy/qualcomm?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/phy/qualcomm?h=linus%2Fmaster'/>
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<updated>2022-05-03T04:42:03Z</updated>
<entry>
<title>phy: qcom-qmp: rename error labels</title>
<updated>2022-05-03T04:42:03Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-05-02T13:31:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d413a34932f98cc5bf0ffdd332884a8b63a1a7f9'/>
<id>urn:sha1:d413a34932f98cc5bf0ffdd332884a8b63a1a7f9</id>
<content type='text'>
Rename all error labels after what they are used for in order to improve
readability and for consistency.

Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Link: https://lore.kernel.org/r/20220502133130.4125-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp: fix pipe-clock imbalance on power-on failure</title>
<updated>2022-05-03T04:42:03Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-05-02T13:31:29Z</published>
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<id>urn:sha1:5e73b2d9867998278479ccc065a8a8227a5513ef</id>
<content type='text'>
Make sure to disable the pipe clock also if ufs-reset deassertion fails
during power on.

Note that the ufs-reset is asserted in qcom_qmp_phy_com_exit().

Fixes: c9b589791fc1 ("phy: qcom: Utilize UFS reset controller")
Cc: Evan Green &lt;evgreen@chromium.org&gt;
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Link: https://lore.kernel.org/r/20220502133130.4125-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp: switch to explicit reset helpers</title>
<updated>2022-05-03T04:41:01Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-04-27T06:32:43Z</published>
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<id>urn:sha1:0a97630ac9726436e319e38cb95d73706581c6c4</id>
<content type='text'>
Switch to consistently using the explicit reset-controller API which
makes it clear that the reset controllers are used exclusively by the
PHY driver.

Note that the deprecated of_reset_control_get() and
devm_reset_control_get() are just transitional wrappers for the explicit
API so there's no functional change.

Suggested-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220427063243.32576-4-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp: fix reset-controller leak on probe errors</title>
<updated>2022-05-03T04:41:01Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-04-27T06:32:42Z</published>
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<id>urn:sha1:4d2900f20edfe541f75756a00deeb2ffe7c66bc1</id>
<content type='text'>
Make sure to release the lane reset controller in case of a late probe
error (e.g. probe deferral).

Note that due to the reset controller being defined in devicetree in
"lane" child nodes, devm_reset_control_get_exclusive() cannot be used
directly.

Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: stable@vger.kernel.org      # 4.12
Cc: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Reviewed-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220427063243.32576-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp: fix struct clk leak on probe errors</title>
<updated>2022-05-03T04:41:01Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-04-27T06:32:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f0a4bc38a12f5a0cc5ad68670d9480e91e6a94df'/>
<id>urn:sha1:f0a4bc38a12f5a0cc5ad68670d9480e91e6a94df</id>
<content type='text'>
Make sure to release the pipe clock reference in case of a late probe
error (e.g. probe deferral).

Fixes: e78f3d15e115 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: stable@vger.kernel.org      # 4.12
Cc: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Reviewed-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Link: https://lore.kernel.org/r/20220427063243.32576-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp: fix phy-descriptor kernel-doc typo</title>
<updated>2022-05-02T10:10:11Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-04-20T15:23:30Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c7fd98f84ead200d10367bcf40d82dcf706a84c4'/>
<id>urn:sha1:c7fd98f84ead200d10367bcf40d82dcf706a84c4</id>
<content type='text'>
Fix misspelled "clock" in the description of the pipe_clk field in the
PHY-descriptor kernel-doc comment.

Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Link: https://lore.kernel.org/r/20220420152331.5527-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp: Add support for SDX65 QMP PHY</title>
<updated>2022-04-13T07:55:00Z</updated>
<author>
<name>Rohit Agarwal</name>
<email>quic_rohiagar@quicinc.com</email>
</author>
<published>2022-04-12T05:17:32Z</published>
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<id>urn:sha1:8585b1be79528cabc86164530dbd3326d38623cf</id>
<content type='text'>
Add support for USB3 QMP PHY found in SDX65 platform. SDX65 uses
version 5.0.0 of the QMP PHY IP.

Signed-off-by: Rohit Agarwal &lt;quic_rohiagar@quicinc.com&gt;
Acked-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://lore.kernel.org/r/1649740652-17515-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp: Add SM6350 UFS PHY support</title>
<updated>2022-04-11T18:04:01Z</updated>
<author>
<name>Luca Weiss</name>
<email>luca.weiss@fairphone.com</email>
</author>
<published>2022-03-21T13:33:15Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6f3652c952d8d8d22da1d535c470906da6e1afde'/>
<id>urn:sha1:6f3652c952d8d8d22da1d535c470906da6e1afde</id>
<content type='text'>
The SM6350 UFS PHY is compatible with the one from SDM845. Add a
compatible for that.

Signed-off-by: Luca Weiss &lt;luca.weiss@fairphone.com&gt;
Link: https://lore.kernel.org/r/20220321133318.99406-4-luca.weiss@fairphone.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp: add sc8280xp UFS PHY</title>
<updated>2022-03-02T14:36:54Z</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2022-02-25T03:51:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c6455af548991ed22c89528f998fd965c052fb2e'/>
<id>urn:sha1:c6455af548991ed22c89528f998fd965c052fb2e</id>
<content type='text'>
Reuse the SM8350 UFS PHY initialization sequence to add support for the
same found in the Qualcomm SC8280XP platform.

Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220225035105.2294599-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-snps: Add sc8280xp support</title>
<updated>2022-03-02T14:36:54Z</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2022-02-25T03:40:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=7addff4018f0d5b94a8f5816fa752ea05ccfa23e'/>
<id>urn:sha1:7addff4018f0d5b94a8f5816fa752ea05ccfa23e</id>
<content type='text'>
The Qualcomm sc8280xp platform comes with a 5nm femto USB PHY which, in
contrast to previously seen platforms, has the SIDDQ bit in the COMMON0
register default to high.

So make the driver match on the 5nm compatible and make sure to clear
the SIDDQ bit on phy_init.

Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Link: https://lore.kernel.org/r/20220225034049.2294207-2-bjorn.andersson@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
</feed>
