<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/pinctrl/sh-pfc, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/pinctrl/sh-pfc?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/pinctrl/sh-pfc?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2020-09-15T08:04:35Z</updated>
<entry>
<title>pinctrl: Rename sh-pfc to renesas</title>
<updated>2020-09-15T08:04:35Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-09-09T13:15:33Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=077365a941166f3a7f5894017f9d26d17cdec00e'/>
<id>urn:sha1:077365a941166f3a7f5894017f9d26d17cdec00e</id>
<content type='text'>
The drivers/pinctrl/sh-pfc subdirectory was originally created to group
pin control drivers for various Renesas SuperH and SH-Mobile platforms.
However, the name "sh-pfc" no longer reflects its contents, as the
directory now contains pin control drivers for Renesas SuperH, ARM32,
and ARM64 SoCs.

Hence rename the subdirectory from drivers/pinctrl/sh-pfc to
drivers/pinctrl/renesas, and the related Kconfig symbol from
PINCTRL_SH_PFC to PINCTRL_RENESAS.

Rename the git branch in MAINTAINERS, too, for consistency.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/r/20200909131534.12897-3-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: rzn1: Do not select GENERIC_PIN{CTRL_GROUPS,MUX_FUNCTIONS}</title>
<updated>2020-09-15T08:04:35Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-09-09T13:15:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1308fb4e4eae14e6189dece3b7cf5b5f453c5d02'/>
<id>urn:sha1:1308fb4e4eae14e6189dece3b7cf5b5f453c5d02</id>
<content type='text'>
The RZ/N1 pin control driver does not use pin groups or pin functions,
so there is no need to select GENERIC_PINCTRL_GROUPS or
GENERIC_PINMUX_FUNCTIONS.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/r/20200909131534.12897-2-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: rza1: Switch to using "output-enable"</title>
<updated>2020-09-15T07:37:20Z</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-08-21T11:14:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a4eb6afa7c2c3795ec693cd806fd69593c9ecca7'/>
<id>urn:sha1:a4eb6afa7c2c3795ec693cd806fd69593c9ecca7</id>
<content type='text'>
For pins requiring software driven IO output operations, the RZ/A1 Pin
Controller uses either the "output-high" or "output-low" DT property to
enable the corresponding output buffer.  The actual line value doesn't
matter, as it is ignored.

Commit 425562429d4f3b13 ("pinctrl: generic: Add output-enable property")
introduced a new DT property for this specific use case.

Update the RZ/A1 Pin Controller DT bindings and driver to use this new
property instead.  Preserve backwards compatibility with old DTBs in the
driver, as this comes at a very small cost.

Notes:
  - The DT binding examples already used the new property,
  - There are no upstream users of the old properties.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Chris Brandt &lt;chris.brandt@renesas.com&gt;
Acked-by: Jacopo Mondi &lt;jacopo@jmondi.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20200821111401.4021-1-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: Tidy up driver description title</title>
<updated>2020-09-15T07:37:20Z</updated>
<author>
<name>Kuninori Morimoto</name>
<email>kuninori.morimoto.gx@renesas.com</email>
</author>
<published>2020-08-24T05:49:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d89a08f52b0dd30d8e13c91886788cd42333dba7'/>
<id>urn:sha1:d89a08f52b0dd30d8e13c91886788cd42333dba7</id>
<content type='text'>
Sort each driver by description title in alphabetical order.

Signed-off-by: Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;
Link: https://lore.kernel.org/r/87h7ssy4qy.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: Align driver description title</title>
<updated>2020-09-15T07:37:20Z</updated>
<author>
<name>Kuninori Morimoto</name>
<email>kuninori.morimoto.gx@renesas.com</email>
</author>
<published>2020-08-24T05:49:52Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=16261dcd7cd17409b3f1235b0b89a805338eac28'/>
<id>urn:sha1:16261dcd7cd17409b3f1235b0b89a805338eac28</id>
<content type='text'>
Now, Renesas Pin Control drivers are under menu, but current
descriptions are not aligned.
This patch aligns them.

    - RZ/A2 gpio and pinctrl driver
    - RZ/N1 pinctrl driver
    - Emma Mobile EV2 pin control support
    - R-Mobile APE6 pin control support
    - R-Mobile A1 pin control support
    - RZ/G1H pin control support
    - RZ/G1M pin control support

    + pin control support for RZ/A2
    + pin control support for RZ/N1
    + pin control support for Emma Mobile EV2
    + pin control support for R-Mobile APE6
    + pin control support for R-Mobile A1
    + pin control support for RZ/G1H
    + pin control support for RZ/G1M

Signed-off-by: Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;
Link: https://lore.kernel.org/r/87imd8y4r2.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: Collect Renesas related CONFIGs in one place</title>
<updated>2020-09-15T07:37:20Z</updated>
<author>
<name>Kuninori Morimoto</name>
<email>kuninori.morimoto.gx@renesas.com</email>
</author>
<published>2020-08-24T05:49:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=af028ecd546a71b4d3937b63e1b39707ef9c3b17'/>
<id>urn:sha1:af028ecd546a71b4d3937b63e1b39707ef9c3b17</id>
<content type='text'>
Renesas related pinctrl CONFIGs are located in many places, which is
confusing.
This patch collects them into the same place, grouped in a new "Renesas
pinctrl drivers" menu.
This patch also moves pinctrl-rz{a1,a2,n1}.c into the sh-pfc folder.

Signed-off-by: Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;
Link: https://lore.kernel.org/r/87k0xoy4r7.wl-kuninori.morimoto.gx@renesas.com
[geert: Update path in MAINTAINERS]
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: Tidy up Emma Mobile EV2</title>
<updated>2020-09-15T07:37:20Z</updated>
<author>
<name>Kuninori Morimoto</name>
<email>kuninori.morimoto.gx@renesas.com</email>
</author>
<published>2020-08-24T05:49:40Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=aa5b0f7e0f7e8a05c5bd9bfab33d98699735762f'/>
<id>urn:sha1:aa5b0f7e0f7e8a05c5bd9bfab33d98699735762f</id>
<content type='text'>
It is "Emma Mobile EV2" not "AV2".
This patch tidies it up.

Reported-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;
Link: https://lore.kernel.org/r/87lfi4y4re.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7790: Add CAN pins, groups and functions</title>
<updated>2020-08-31T07:29:43Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2020-08-25T09:54:48Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=bbf369d4e59a248ed715041267951f5cd051b317'/>
<id>urn:sha1:bbf369d4e59a248ed715041267951f5cd051b317</id>
<content type='text'>
Add pins, groups and functions for the CAN{0,1} interface.

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Chris Paterson &lt;Chris.Paterson2@renesas.com&gt;
Link: https://lore.kernel.org/r/20200825095448.13093-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7790: Add USB1 PWEN pin and group</title>
<updated>2020-08-17T07:54:40Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2020-07-17T17:00:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=417e24986935f6bd6afa38010cc981cf4d7a7bef'/>
<id>urn:sha1:417e24986935f6bd6afa38010cc981cf4d7a7bef</id>
<content type='text'>
Add USB1 PWEN pin and group for USB1 interface.

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/1595005225-11519-2-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: pfc-r8a77951: Add R8A774E1 PFC support</title>
<updated>2020-07-14T12:57:53Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2020-07-07T16:18:12Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a5e8b53adeb4b458971dfd6232b71299010e981a'/>
<id>urn:sha1:a5e8b53adeb4b458971dfd6232b71299010e981a</id>
<content type='text'>
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (R8A77951),
however it doesn't have several automotive specific peripherals. Add
automotive-specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/1594138692-16816-13-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
</feed>
