<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/pinctrl/tegra, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/pinctrl/tegra?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/pinctrl/tegra?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-05-04T21:40:05Z</updated>
<entry>
<title>pinctrl: tegra: tegra194: drop unused pin groups</title>
<updated>2022-05-04T21:40:05Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2022-04-29T06:13:32Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a9387099d8a14cc9eaf6db15db1aa37bcfc3ac2d'/>
<id>urn:sha1:a9387099d8a14cc9eaf6db15db1aa37bcfc3ac2d</id>
<content type='text'>
The sdmmc1_hv_trim_pins, sdmmc3_hv_trim_pins and sys_reset_n_pins are
not defined as pin groups:

  drivers/pinctrl/tegra/pinctrl-tegra194.c:1119:27: error: ‘sdmmc3_hv_trim_pins’ defined but not used [-Werror=unused-const-variable=]
   1119 | static const unsigned int sdmmc3_hv_trim_pins[] = {

Proper fix would be to define them, but this requires knowledge from
datasheet.  Removal should not cause any harm and at least it silences
the warnings.

Fixes: 613c0826081b ("pinctrl: tegra: Add pinmux support for Tegra194")
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20220429061332.25135-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra194: remove duplicate initializer again</title>
<updated>2021-11-16T01:19:15Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2021-11-04T13:36:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=293083f877a7d9dba8165cc3bd159cbfcea28fe7'/>
<id>urn:sha1:293083f877a7d9dba8165cc3bd159cbfcea28fe7</id>
<content type='text'>
An earlier bugfix removed a duplicate field initializer in
a macro, but it seems that this came back with the following
update:

drivers/pinctrl/tegra/pinctrl-tegra194.c:1341:28: error: initialized field overwritten [-Werror=override-init]
 1341 |                 .drv_reg = ((r)),                               \
      |                            ^
drivers/pinctrl/tegra/pinctrl-tegra194.c:1392:41: note: in expansion of macro 'DRV_PINGROUP_ENTRY_Y'
 1392 | #define drive_touch_clk_pcc4            DRV_PINGROUP_ENTRY_Y(0x2004,    12,     5,      20,     5,      -1,     -1,     -1,     -1,     1)
      |                                         ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/tegra/pinctrl-tegra194.c:1631:17: note: in expansion of macro 'drive_touch_clk_pcc4'
 1631 |                 drive_##pg_name,                                \
      |                 ^~~~~~
drivers/pinctrl/tegra/pinctrl-tegra194.c:1636:9: note: in expansion of macro 'PINGROUP'
 1636 |         PINGROUP(touch_clk_pcc4,        GP,             TOUCH,          RSVD2,          RSVD3,          0x2000,         1,      Y,      -1,     -1,     6,      8,      -1,     10,     11,     12,     N,      -1,     -1,     N,      "vddio_ao"),
      |         ^~~~~~~~
drivers/pinctrl/tegra/pinctrl-tegra194.c:1341:28: note: (near initialization for 'tegra194_groups[0].drv_reg')
 1341 |                 .drv_reg = ((r)),                               \
      |                            ^
drivers/pinctrl/tegra/pinctrl-tegra194.c:1392:41: note: in expansion of macro 'DRV_PINGROUP_ENTRY_Y'
 1392 | #define drive_touch_clk_pcc4            DRV_PINGROUP_ENTRY_Y(0x2004,    12,     5,      20,     5,      -1,     -1,     -1,     -1,     1)
      |                                         ^~~~~~~~~~~~~~~~~~~~
drivers/pinctrl/tegra/pinctrl-tegra194.c:1631:17: note: in expansion of macro 'drive_touch_clk_pcc4'
 1631 |                 drive_##pg_name,                                \
      |                 ^~~~~~
drivers/pinctrl/tegra/pinctrl-tegra194.c:1636:9: note: in expansion of macro 'PINGROUP'
 1636 |         PINGROUP(touch_clk_pcc4,        GP,             TOUCH,          RSVD2,          RSVD3,          0x2000,         1,      Y,      -1,     -1,     6,      8,      -1,     10,     11,     12,     N,      -1,     -1,     N,      "vddio_ao"),
      |         ^~~~~~~~

Remove it again.

Fixes: 613c0826081b ("pinctrl: tegra: Add pinmux support for Tegra194")
Fixes: 92cadf68e50a ("pinctrl: tegra: pinctrl-tegra194: Do not initialise field twice")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Link: https://lore.kernel.org/r/20211104133645.1186968-1-arnd@kernel.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: Return const pointer from tegra_pinctrl_get_group()</title>
<updated>2021-11-16T01:19:14Z</updated>
<author>
<name>Prathamesh Shete</name>
<email>pshete@nvidia.com</email>
</author>
<published>2021-10-28T12:02:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=55924812d208a8a27a6690db2bbba357bd2773f0'/>
<id>urn:sha1:55924812d208a8a27a6690db2bbba357bd2773f0</id>
<content type='text'>
Instead of returning const pointer from tegra_pinctrl_get_group()
the return value is being casted.

This change helps return const pointer.

Signed-off-by: Prathamesh Shete &lt;pshete@nvidia.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: Fix warnings and error</title>
<updated>2021-10-26T17:59:44Z</updated>
<author>
<name>Prathamesh Shete</name>
<email>pshete@nvidia.com</email>
</author>
<published>2021-10-26T12:11:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f0c142fcf4d6a671109d6bd00d77993e65fb9f47'/>
<id>urn:sha1:f0c142fcf4d6a671109d6bd00d77993e65fb9f47</id>
<content type='text'>
Fix warnings are errors caused by commit a42c7d95d29e
("pinctrl: tegra: Use correct offset for pin group").

Signed-off-by: Prathamesh Shete &lt;pshete@nvidia.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: Use correct offset for pin group</title>
<updated>2021-10-25T23:27:39Z</updated>
<author>
<name>Prathamesh Shete</name>
<email>pshete@nvidia.com</email>
</author>
<published>2021-10-25T11:09:59Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=a42c7d95d29ec1d57511e87793ea1fa4ad41984d'/>
<id>urn:sha1:a42c7d95d29ec1d57511e87793ea1fa4ad41984d</id>
<content type='text'>
Function tegra_pinctrl_gpio_request_enable() and
tegra_pinctrl_gpio_disable_free() uses pin offset instead
of group offset, causing the driver to use wrong offset
to enable gpio.

Add a helper function tegra_pinctrl_get_group() to parse the
pin group and determine correct offset.

Signed-off-by: Kartik K &lt;kkartik@nvidia.com&gt;
Signed-off-by: Prathamesh Shete &lt;pshete@nvidia.com&gt;
Link: https://lore.kernel.org/r/20211025110959.27751-1-pshete@nvidia.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: Add pinmux support for Tegra194</title>
<updated>2021-10-24T21:14:48Z</updated>
<author>
<name>Prathamesh Shete</name>
<email>pshete@nvidia.com</email>
</author>
<published>2021-10-18T12:18:15Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=613c0826081bb4c6517f1a593480f9d60a00d88f'/>
<id>urn:sha1:613c0826081bb4c6517f1a593480f9d60a00d88f</id>
<content type='text'>
This change adds pinmux table entries for Tegra194

Signed-off-by: Prathamesh Shete &lt;pshete@nvidia.com&gt;
Link: https://lore.kernel.org/r/20211018121815.3017-2-pshete@nvidia.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: include lpdr pin properties</title>
<updated>2021-10-24T21:14:48Z</updated>
<author>
<name>Suresh Mangipudi</name>
<email>smangipudi@nvidia.com</email>
</author>
<published>2021-10-18T12:18:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=8d886bba3b13acb918d96af12cfc3d8c2e632ce3'/>
<id>urn:sha1:8d886bba3b13acb918d96af12cfc3d8c2e632ce3</id>
<content type='text'>
Update lpdr pin-property for supported pins.

lpdr property help disable most basic driver fingers
leaving only minimal base driver finger.

Signed-off-by: Suresh Mangipudi &lt;smangipudi@nvidia.com&gt;
Signed-off-by: Prathamesh Shete &lt;pshete@nvidia.com&gt;
Link: https://lore.kernel.org/r/20211018121815.3017-1-pshete@nvidia.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2020-08-09T19:52:28Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-08-09T19:52:28Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9420f1ce01869409d78901c3e036b2c437cbc6b8'/>
<id>urn:sha1:9420f1ce01869409d78901c3e036b2c437cbc6b8</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "This is the bulk of the pin control changes for the v5.9 kernel
  series:

  Core changes:

   - The GPIO patch "gpiolib: Introduce for_each_requested_gpio_in_range()
     macro" was put in an immutable branch and merged into the pinctrl
     tree as well. We see these changes also here.

   - Improved debug output for pins used as GPIO.

  New drivers:

   - Ocelot Sparx5 SoC driver.

   - Intel Emmitsburg SoC subdriver.

   - Intel Tiger Lake-H SoC subdriver.

   - Qualcomm PM660 SoC subdriver.

   - Renesas SH-PFC R8A774E1 subdriver.

  Driver improvements:

   - Linear improvement and cleanups of the Intel drivers for
     Cherryview, Lynxpoint, Baytrail etc. Improved locking among other
     things.

   - Renesas SH-PFC has added support for RPC pins, groups, and
     functions to r8a77970 and r8a77980.

   - The newere Freescale (now NXP) i.MX8 pin controllers have been
     modularized. This is driven by the Google Android GKI initiative I
     think.

   - Open drain support for pins on the Qualcomm IPQ4019.

   - The Ingenic driver can handle both edges IRQ detection.

   - A big slew of documentation fixes all over the place.

   - A few irqchip template conversions by yours truly.

* tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
  dt-bindings: pinctrl: add bindings for MediaTek MT6779 SoC
  pinctrl: stmfx: Use irqchip template
  pinctrl: amd: Use irqchip template
  pinctrl: mediatek: fix build for tristate changes
  pinctrl: samsung: Use bank name as irqchip name
  pinctrl: core: print gpio in pins debugfs file
  pinctrl: mediatek: add mt6779 eint support
  pinctrl: mediatek: add pinctrl support for MT6779 SoC
  pinctrl: mediatek: avoid virtual gpio trying to set reg
  pinctrl: mediatek: update pinmux definitions for mt6779
  pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API
  pinctrl: mcp23s08: Use irqchip template
  pinctrl: sx150x: Use irqchip template
  dt-bindings: ingenic,pinctrl: Support pinmux/pinconf nodes
  pinctrl: intel: Add Intel Emmitsburg pin controller support
  pinctl: ti: iodelay: Replace HTTP links with HTTPS ones
  Revert "gpio: omap: handle pin config bias flags"
  pinctrl: single: Use fallthrough pseudo-keyword
  pinctrl: qcom: spmi-gpio: Use fallthrough pseudo-keyword
  pinctrl: baytrail: Use fallthrough pseudo-keyword
  ...
</content>
</entry>
<entry>
<title>pinctrl: tegra: pinctrl-tegra194: Do not initialise field twice</title>
<updated>2020-07-16T13:58:12Z</updated>
<author>
<name>Lee Jones</name>
<email>lee.jones@linaro.org</email>
</author>
<published>2020-07-13T14:49:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=92cadf68e50a5641356fe9dcbc486ae23168b568'/>
<id>urn:sha1:92cadf68e50a5641356fe9dcbc486ae23168b568</id>
<content type='text'>
Both PIN_PINGROUP_ENTRY_Y() and DRV_PINGROUP_ENTRY_Y() macros are
called for each of the 2 pin groups defined here, and both of them
initialise 'drv_reg', causing the compiler to complain.

Only initialise 'drv_reg' once.

Fixes the following W=1 kernel build warning(s):

 drivers/pinctrl/tegra/pinctrl-tegra194.c:71:14: warning: initialized field overwritten [-Woverride-init]
 71 | .drv_reg = ((r)), | ^
 drivers/pinctrl/tegra/pinctrl-tegra194.c:105:2: note: in expansion of macro ‘DRV_PINGROUP_ENTRY_Y’
 105 | DRV_PINGROUP_ENTRY_Y(0x14004, 12, 5, 20, 5, -1, -1, -1, -1, 0)
 | ^~~~~~~~~~~~~~~~~~~~
 drivers/pinctrl/tegra/pinctrl-tegra194.c:124:3: note: in expansion of macro ‘drive_pex_l5_clkreq_n_pgg0’
 124 | drive_##pg_name, | ^~~~~~
 drivers/pinctrl/tegra/pinctrl-tegra194.c:128:2: note: in expansion of macro ‘PINGROUP’
 128 | PINGROUP(pex_l5_clkreq_n_pgg0, PE5, RSVD1, RSVD2, RSVD3, 0x14000, 0,
 | ^~~~~~~~
 drivers/pinctrl/tegra/pinctrl-tegra194.c:71:14: note: (near initialization for ‘tegra194_groups[0].drv_reg’)
 71 | .drv_reg = ((r)), | ^
 drivers/pinctrl/tegra/pinctrl-tegra194.c:105:2: note: in expansion of macro ‘DRV_PINGROUP_ENTRY_Y’
 105 | DRV_PINGROUP_ENTRY_Y(0x14004, 12, 5, 20, 5, -1, -1, -1, -1, 0)
 | ^~~~~~~~~~~~~~~~~~~~
 drivers/pinctrl/tegra/pinctrl-tegra194.c:124:3: note: in expansion of macro ‘drive_pex_l5_clkreq_n_pgg0’
 124 | drive_##pg_name, | ^~~~~~
 drivers/pinctrl/tegra/pinctrl-tegra194.c:128:2: note: in expansion of macro ‘PINGROUP’
 128 | PINGROUP(pex_l5_clkreq_n_pgg0, PE5, RSVD1, RSVD2, RSVD3, 0x14000, 0,
 | ^~~~~~~~
 drivers/pinctrl/tegra/pinctrl-tegra194.c:71:14: warning: initialized field overwritten [-Woverride-init]
 71 | .drv_reg = ((r)), | ^
 drivers/pinctrl/tegra/pinctrl-tegra194.c:107:2: note: in expansion of macro ‘DRV_PINGROUP_ENTRY_Y’
 107 | DRV_PINGROUP_ENTRY_Y(0x1400c, 12, 5, 20, 5, -1, -1, -1, -1, 0)
 | ^~~~~~~~~~~~~~~~~~~~
 drivers/pinctrl/tegra/pinctrl-tegra194.c:124:3: note: in expansion of macro ‘drive_pex_l5_rst_n_pgg1’
 124 | drive_##pg_name, | ^~~~~~
 drivers/pinctrl/tegra/pinctrl-tegra194.c:130:2: note: in expansion of macro ‘PINGROUP’
 130 | PINGROUP(pex_l5_rst_n_pgg1, PE5, RSVD1, RSVD2, RSVD3, 0x14008, 0,
 | ^~~~~~~~
 drivers/pinctrl/tegra/pinctrl-tegra194.c:71:14: note: (near initialization for ‘tegra194_groups[1].drv_reg’)
 71 | .drv_reg = ((r)), | ^
 drivers/pinctrl/tegra/pinctrl-tegra194.c:107:2: note: in expansion of macro ‘DRV_PINGROUP_ENTRY_Y’
 107 | DRV_PINGROUP_ENTRY_Y(0x1400c, 12, 5, 20, 5, -1, -1, -1, -1, 0)
 | ^~~~~~~~~~~~~~~~~~~~
 drivers/pinctrl/tegra/pinctrl-tegra194.c:124:3: note: in expansion of macro ‘drive_pex_l5_rst_n_pgg1’
 124 | drive_##pg_name, | ^~~~~~
 drivers/pinctrl/tegra/pinctrl-tegra194.c:130:2: note: in expansion of macro ‘PINGROUP’
 130 | PINGROUP(pex_l5_rst_n_pgg1, PE5, RSVD1, RSVD2, RSVD3, 0x14008, 0,
 | ^~~~~~~~

Signed-off-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Cc: Thierry Reding &lt;thierry.reding@gmail.com&gt;
Cc: Jonathan Hunter &lt;jonathanh@nvidia.com&gt;
Cc: linux-tegra@vger.kernel.org
Link: https://lore.kernel.org/r/20200713144930.1034632-23-lee.jones@linaro.org
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: Use noirq suspend/resume callbacks</title>
<updated>2020-06-16T08:19:53Z</updated>
<author>
<name>Vidya Sagar</name>
<email>vidyas@nvidia.com</email>
</author>
<published>2020-06-04T17:49:35Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=782b6b69847f34dda330530493ea62b7de3fd06a'/>
<id>urn:sha1:782b6b69847f34dda330530493ea62b7de3fd06a</id>
<content type='text'>
Use noirq suspend/resume callbacks as other drivers which implement
noirq suspend/resume callbacks (Ex:- PCIe) depend on pinctrl driver to
configure the signals used by their respective devices in the noirq phase.

Signed-off-by: Vidya Sagar &lt;vidyas@nvidia.com&gt;
Reviewed-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Link: https://lore.kernel.org/r/20200604174935.26560-1-vidyas@nvidia.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
