linux-dev/drivers/platform/x86/intel_pmc_core.c, branch linus/master

platform/x86: intel_pmc_core: Move to intel sub-directory

2021-08-20T18:00:21Z

Move Intel PMC core driver to intel sub-directory to improve readability. Signed-off-by: Kate Hsuan Reviewed-by: Hans de Goede Signed-off-by: Andy Shevchenko Reviewed-by: Rajneesh Bhardwaj Link: https://lore.kernel.org/r/20210820110458.73018-7-andriy.shevchenko@linux.intel.com Signed-off-by: Hans de Goede

platform/x86: intel_pmc_core: Prevent possibile overflow

2021-08-17T18:53:10Z

Substate priority levels are encoded in 4 bits in the LPM_PRI register. This value was used as an index to an array whose element size was less than 16, leading to the possibility of overflow should we read a larger than expected priority. In addition to the overflow, bad values could lead to incorrect state reporting. So rework the priority code to prevent the overflow and perform some validation of the register. Use the priority register values if they give an ordering of unique numbers between 0 and the maximum number of states. Otherwise, use a default ordering instead. Reported-by: Evgeny Novikov Signed-off-by: David E. Box Reviewed-by: Andy Shevchenko Link: https://lore.kernel.org/r/20210814014728.520856-1-david.e.box@linux.intel.com Signed-off-by: Hans de Goede

platform/x86: intel_pmc_core: Uninitialized data in pmc_core_lpm_latch_mode_write()

2021-04-21T19:32:31Z

The simple_write_to_buffer() can return success if even a single byte is copied from user space. In this case it can result in using uninitalized data if the buf[] array is not fully initialized. Really we should only succeed if the whole buffer is copied. Just using copy_from_user() is simpler and more appropriate. Fixes: 8074a79fad2e ("platform/x86: intel_pmc_core: Add option to set/clear LPM mode") Signed-off-by: Dan Carpenter Link: https://lore.kernel.org/r/YIBCf+G9Ef8wrGJw@mwanda Signed-off-by: Hans de Goede

platform/x86: intel_pmc_core: Fix "unsigned 'ret' is never less than zero" smatch warning

2021-04-20T15:01:48Z

Change the type of ret form a size_t to a ssize_t, matching the prototype of simple_write_to_buffer(), fixing this warning reported by smatch: drivers/platform/x86/intel_pmc_core.c:1369 pmc_core_lpm_latch_mode_write() warn: unsigned 'ret' is never less than zero. Fixes: 8074a79fad2e ("platform/x86: intel_pmc_core: Add option to set/clear LPM mode") Cc: David E. Box Reported-by: kernel test robot Signed-off-by: Hans de Goede Link: https://lore.kernel.org/r/20210419143109.30612-1-hdegoede@redhat.com

platform/x86: intel_pmc_core: Add support for Alder Lake PCH-P

2021-04-19T08:44:28Z

Alder PCH-P is based on Tiger Lake PCH. Signed-off-by: David E. Box Reviewed-by: Hans de Goede Acked-by: Rajneesh Bhardwaj Link: https://lore.kernel.org/r/20210417031252.3020837-10-david.e.box@linux.intel.com Signed-off-by: Hans de Goede

platform/x86: intel_pmc_core: Add LTR registers for Tiger Lake

2021-04-19T08:44:28Z

Just like Ice Lake, Tiger Lake uses Cannon Lake's LTR information and supports a few additional registers. Hence add the LTR registers specific to Tiger Lake to the cnp_ltr_show_map[]. Also adjust the number of LTR IPs for Tiger Lake to the correct amount. Signed-off-by: Gayatri Kammela Signed-off-by: David E. Box Reviewed-by: Hans de Goede Acked-by: Rajneesh Bhardwaj Link: https://lore.kernel.org/r/20210417031252.3020837-9-david.e.box@linux.intel.com Signed-off-by: Hans de Goede

platform/x86: intel_pmc_core: Add option to set/clear LPM mode

2021-04-19T08:44:28Z

By default the Low Power Mode (LPM or sub-state) status registers will latch condition status on every entry into Package C10. This is configurable in the PMC to allow latching on any achievable sub-state. Add a debugfs file to support this. Also add the option to clear the status registers to 0. Clearing the status registers before testing removes ambiguity around when the current values were set. The new file, latch_lpm_mode, looks like this: [c10] S0i2.0 S0i3.0 S0i2.1 S0i3.1 S0i3.2 clear Signed-off-by: David E. Box Reviewed-by: Hans de Goede Link: https://lore.kernel.org/r/20210417031252.3020837-8-david.e.box@linux.intel.com Signed-off-by: Hans de Goede

platform/x86: intel_pmc_core: Add requirements file to debugfs

2021-04-19T08:44:28Z

platform/x86: intel_pmc_core: Get LPM requirements for Tiger Lake

2021-04-19T08:44:28Z

Platforms that support low power modes (LPM) such as Tiger Lake maintain requirements for each sub-state that a readable in the PMC. However, unlike LPM status registers, requirement registers are not memory mapped but are available from an ACPI _DSM. Collect the requirements for Tiger Lake using the _DSM method and store in a buffer. Signed-off-by: Gayatri Kammela Co-developed-by: David E. Box Signed-off-by: David E. Box Reviewed-by: Hans de Goede Link: https://lore.kernel.org/r/20210417031252.3020837-6-david.e.box@linux.intel.com Signed-off-by: Hans de Goede

platform/x86: intel_pmc_core: Show LPM residency in microseconds

2021-04-19T08:41:24Z

Modify the low power mode (LPM or sub-state) residency counters to display in microseconds just like the slp_s0_residency counter. The granularity of the counter is approximately 30.5us per tick. Double this value then divide by two to maintain accuracy. Signed-off-by: Gayatri Kammela Signed-off-by: David E. Box Reviewed-by: Hans de Goede Reviewed-by: Rajneesh Bhardwaj Link: https://lore.kernel.org/r/20210417031252.3020837-5-david.e.box@linux.intel.com Signed-off-by: Hans de Goede