linux-dev/drivers/scsi/mpt3sas/mpi, branch master

scsi: mpt3sas: Add support for ATTO ExpressSAS H12xx GT devices

2022-09-01T03:39:57Z

Add ATTO's PCI IDs and modify the driver to handle the unique NVRAM structure used by ATTO's devices. Link: https://lore.kernel.org/r/20220805174609.14830-1-bgrove@attotech.com Co-developed-by: Rob Crispo Signed-off-by: Rob Crispo Signed-off-by: Bradley Grove Signed-off-by: Martin K. Petersen

scsi: mpt3sas: Convert to flexible arrays

2022-02-08T04:16:34Z

This converts to a flexible array instead of the old-style 1-element arrays. The existing code already did the correct math for finding the size of the resulting flexible array structure, so there is no binary difference. The other two structures converted to use flexible arrays appear to have no users at all. Link: https://lore.kernel.org/r/20220201223948.1455637-1-keescook@chromium.org Signed-off-by: Kees Cook Signed-off-by: Martin K. Petersen

scsi: mpt3sas: Replace unnecessary dynamic allocation with a static one

2021-03-17T04:04:40Z

Dynamic memory allocation isn't actually needed and it can be replaced by statically allocating memory for struct object io_unit_pg3 with 36 hardcoded entries for its GPIOVal array. Also, this helps the with ongoing efforts to enable -Warray-bounds by fixing the following warning: drivers/scsi/mpt3sas/mpt3sas_ctl.c: In function ‘BRM_status_show’: drivers/scsi/mpt3sas/mpt3sas_ctl.c:3257:63: warning: array subscript 24 is above array bounds of ‘U16[1]’ {aka ‘short unsigned int[1]’} [-Warray-bounds] 3257 | backup_rail_monitor_status = le16_to_cpu(io_unit_pg3->GPIOVal[24]); ./include/uapi/linux/byteorder/little_endian.h:36:51: note: in definition of macro ‘__le16_to_cpu’ 36 | #define __le16_to_cpu(x) ((__force __u16)(__le16)(x)) | ^ drivers/scsi/mpt3sas/mpt3sas_ctl.c:3257:31: note: in expansion of macro ‘le16_to_cpu’ 3257 | backup_rail_monitor_status = le16_to_cpu(io_unit_pg3->GPIOVal[24]); Link: https://github.com/KSPP/linux/issues/109 Link: https://lore.kernel.org/lkml/202103101058.16ED27BE3@keescook/ Link: https://lore.kernel.org/r/20210310235951.GA108661@embeddedor Reviewed-by: Kees Cook Signed-off-by: Gustavo A. R. Silva Signed-off-by: Martin K. Petersen

scsi: mpt3sas: Update MPI Headers to v02.00.57

2020-01-03T03:23:16Z

Update MPI Headers to version 02.00.57. Link: https://lore.kernel.org/r/20191226111333.26131-2-sreekanth.reddy@broadcom.com Signed-off-by: Sreekanth Reddy Signed-off-by: Martin K. Petersen

scsi: mpt3sas: Update MPI headers to 2.6.8 spec

2019-08-08T02:46:19Z

Updated MPI to 2.6.8 specification and header files to 2.00.54. Signed-off-by: Suganath Prabu Signed-off-by: Martin K. Petersen

scsi: mpt3sas: Enable interrupt coalescing on high iops

2019-06-18T23:46:26Z

Enable interrupt coalescing only on high iops queues. In ioc config page 1, offset 0x14 (ProductSpecific field) is used to determine interrupt coalescing enabled/disabled on per reply descriptor post queue group(8) basis. If 31st bit is zero, then interrupt coalescing is enabled for all reply descriptor post queues. If 31st bit is set to one, then user can enable/disable interrupt coalescing on per reply descriptor post queue group(8) basis. So to enable interrupt coalescing only on first reply descriptor post queue group (i.e. on high iops queues), set bit 0 and 31. This configuration should reset during driver unload or shutdown to the default settings. For this, the driver takes copy of default ioc page 1 and copies back the default or unmodified ioc page1 during unload and shutdown. This means that on next driver load (e.g. if older version driver is loaded by user), current modified changes on ioc page1 won't take effect. Signed-off-by: Suganath Prabu S Signed-off-by: Martin K. Petersen

scsi: mpt3sas: Add support for NVMe Switch Adapter

2019-02-05T03:52:21Z

Added device ID for NVMe Switch Adapter (Ambrosia). VID: 0x1000 DID: 0x02B1 Signed-off-by: Suganath Prabu S Signed-off-by: Martin K. Petersen

scsi: mpt3sas: Rename mpi endpoint device ID macro.

2019-02-05T03:52:21Z

MPI Endpoint is a PCIe switch based on MPI2. Renaming device ID macro from MPI2_MFGPAGE_DEVID_SAS2308_MPI_EP to MPI2_MFGPAGE_DEVID_SWITCH_MPI_EP. Signed-off-by: Suganath Prabu S Signed-off-by: Martin K. Petersen

scsi: mpt3sas: Update MPI headers to support Aero controllers

2018-11-07T01:16:01Z

Updating MPI headers to the latest version 2.6.7 to add support to the driver to detect the new 3816 and 3916 chip based controllers. Separate out firmware image data from mpi2_ioc.h to new file mpi2_image.h Signed-off-by: Suganath Prabu Signed-off-by: Martin K. Petersen

scsi: mpt3sas: Update MPI Headers

2018-05-08T04:34:20Z

Update MPI Files to support protocol level reset for NVMe device. Signed-off-by: Chaitra P B Signed-off-by: Suganath Prabu S Signed-off-by: Martin K. Petersen