linux-dev/drivers/soc/imx, branch master

soc: imx: imx93-pd: Fix the error handling path of imx93_pd_probe()

2022-10-29T08:26:32Z

In imx93_pd_probe(); if an error occurs, some resources need to be released as done in the remove function. Fixes: 0a0f7cc25d4a ("soc: imx: add i.MX93 SRC power domain driver") Signed-off-by: Christophe JAILLET Signed-off-by: Shawn Guo

Merge tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2022-10-06T18:04:57Z

Pull ARM driver updates from Arnd Bergmann: "The drivers branch for 6.1 is a bit larger than for most releases. Most of the changes come from SoC maintainers for the drivers/soc subsystem: - A new driver for error handling on the NVIDIA Tegra 'control backbone' bus. - A new driver for Qualcomm LLCC/DDR bandwidth measurement - New Rockchip rv1126 and rk3588 power domain drivers - DT binding updates for memory controllers, older Rockchip SoCs, various Mediatek devices, Qualcomm SCM firmware - Minor updates to Hisilicon LPC bus, the Allwinner SRAM driver, the Apple rtkit firmware driver, Tegra firmware - Minor updates for SoC drivers (Samsung, Mediatek, Renesas, Tegra, Qualcomm, Broadcom, NXP, ...) There are also some separate subsystem with downstream maintainers that merge updates this way: - Various updates and new drivers in the memory controller subsystem for Mediatek and Broadcom SoCs - Small set of changes in preparation to add support for FF-A v1.1 specification later, in the Arm FF-A firmware subsystem - debugfs support in the PSCI firmware subsystem" * tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (149 commits) ARM: remove check for CONFIG_DEBUG_LL_SER3 firmware/psci: Add debugfs support to ease debugging firmware/psci: Print a warning if PSCI doesn't accept PC mode dt-bindings: memory: snps,dw-umctl2-ddrc: Extend schema with IRQs/resets/clocks props dt-bindings: memory: snps,dw-umctl2-ddrc: Replace opencoded numbers with macros dt-bindings: memory: snps,dw-umctl2-ddrc: Use more descriptive device name dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller support soc: sunxi: sram: Add support for the D1 system control soc: sunxi: sram: Export the LDO control register soc: sunxi: sram: Save a pointer to the OF match data soc: sunxi: sram: Return void from the release function soc: apple: rtkit: Add apple_rtkit_poll soc: imx: add i.MX93 media blk ctrl driver soc: imx: add i.MX93 SRC power domain driver soc: imx: imx8m-blk-ctrl: Use genpd_xlate_onecell soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR soc: imx: add icc paths for i.MX8MP hsio/hdmi blk ctrl soc: imx: add icc paths for i.MX8MP media blk ctrl ...

soc: imx: add i.MX93 media blk ctrl driver

2022-09-17T08:31:06Z

Add i.MX93 mediamix blk ctrl support. i.MX93 mediamix blk ctrl has registers to set QoS(priority) value. It support default QoS value and cfg QoS value. Set an initial value from i.MX design team. If LCDIF/ISI/PXP wanna a different QoS value in future, they could use interconnect to request bandwidth. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo

soc: imx: add i.MX93 SRC power domain driver

2022-09-17T08:31:06Z

Support controlling power domain managed by System Reset Controller(SRC). Current supported power domain is mediamix power domain. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo

soc: imx: imx8m-blk-ctrl: Use genpd_xlate_onecell

2022-09-17T08:30:54Z

Simplify driver by using genpd_xlate_onecell instead of driver specific xlate function. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo

soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets

2022-09-17T08:30:54Z

Dessert the PHY reset when powering up the domain and put it back into reset when the domain is powered down. Signed-off-by: Lucas Stach Signed-off-by: Richard Zhu Signed-off-by: Shawn Guo

soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl

2022-09-17T08:30:53Z

i.MX8MP has a VPU blk ctrl module that could supply clk and reset to VPU, so add support for it. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo

soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR

2022-09-17T08:30:53Z

i.MX8MP HDMI supports HDCP and HRV_MWR(HDMI RX Video Memory Write Master for RXRX validation), so add them. Signed-off-by: Peng Fan Signed-off-by: Shawn Guo

soc: imx: add icc paths for i.MX8MP hsio/hdmi blk ctrl

2022-09-17T08:30:36Z

Add interconnect paths for i.MX8MP hsio/hdmi blk ctrl Signed-off-by: Peng Fan Signed-off-by: Shawn Guo

soc: imx: add icc paths for i.MX8MP media blk ctrl

2022-09-17T08:30:32Z

Add interconnect paths for i.MX8MP media blk ctrl Signed-off-by: Peng Fan Signed-off-by: Shawn Guo