<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/drivers/soc/renesas/Kconfig, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/drivers/soc/renesas/Kconfig?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/drivers/soc/renesas/Kconfig?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-08-16T07:24:44Z</updated>
<entry>
<title>soc: renesas: Identify RZ/Five SoC</title>
<updated>2022-08-16T07:24:44Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2022-07-22T14:15:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ebd0e06f3063cc2e3a689112904b29720579c6d2'/>
<id>urn:sha1:ebd0e06f3063cc2e3a689112904b29720579c6d2</id>
<content type='text'>
Add support for identifying the (R9A07G043) RZ/Five SoC.

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20220722141506.20171-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>soc: renesas: Kconfig: Enable IRQC driver for RZ/G2L SoC</title>
<updated>2022-08-15T08:19:01Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2022-07-18T19:28:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=41a21e578da4986685f013d45454a12457f01180'/>
<id>urn:sha1:41a21e578da4986685f013d45454a12457f01180</id>
<content type='text'>
Select RENESAS_RZG2L_IRQC config option if ARCH_RZG2L is enabled
so that IRQC driver is enabled on RZ/G2L (and alike) SoC's.

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20220718192824.7246-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>soc: renesas: rzn1: Select PM and PM_GENERIC_DOMAINS configs</title>
<updated>2022-04-28T14:47:14Z</updated>
<author>
<name>Herve Codina</name>
<email>herve.codina@bootlin.com</email>
</author>
<published>2022-04-22T12:08:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=14f11da778ff642142e9be18814815754c82d6c5'/>
<id>urn:sha1:14f11da778ff642142e9be18814815754c82d6c5</id>
<content type='text'>
PM and PM_GENERIC_DOMAINS configs are required for RZ/N1 SOCs.
Without these configs, the clocks used by the PCI bridge are not
enabled and so accessing the devices leads to a kernel crash:

    Unhandled fault: external abort on non-linefetch (0x1008) at 0x90b5f848

Select PM and PM_GENERIC_DOMAINS for ARCH_RZN1

Signed-off-by: Herve Codina &lt;herve.codina@bootlin.com&gt;
Link: https://lore.kernel.org/r/20220422120850.769480-5-herve.codina@bootlin.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>soc: renesas: Add RZ/V2M (R9A09G011) config option</title>
<updated>2022-04-28T14:46:47Z</updated>
<author>
<name>Phil Edworthy</name>
<email>phil.edworthy@renesas.com</email>
</author>
<published>2022-04-20T20:43:07Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=068eb5a9105bc43a60bdb20484840e5de945fe1d'/>
<id>urn:sha1:068eb5a9105bc43a60bdb20484840e5de945fe1d</id>
<content type='text'>
Add a configuration option for the RZ/V2M SoC.

Signed-off-by: Phil Edworthy &lt;phil.edworthy@renesas.com&gt;
Link: https://lore.kernel.org/r/20220420204307.87343-1-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>soc: renesas: Identify R-Car V4H</title>
<updated>2022-04-25T08:58:58Z</updated>
<author>
<name>Yoshihiro Shimoda</name>
<email>yoshihiro.shimoda.uh@renesas.com</email>
</author>
<published>2022-04-20T08:42:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=87ab58e1fe3aa5a7f7afafe242d73a94a16d6e9c'/>
<id>urn:sha1:87ab58e1fe3aa5a7f7afafe242d73a94a16d6e9c</id>
<content type='text'>
Add support for identifying the R-Car V4H (R8A779G0) SoC.

Signed-off-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Link: https://lore.kernel.org/r/20220420084255.375700-11-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>soc: renesas: r8a779g0-sysc: Add r8a779g0 support</title>
<updated>2022-04-25T08:58:58Z</updated>
<author>
<name>Yoshihiro Shimoda</name>
<email>yoshihiro.shimoda.uh@renesas.com</email>
</author>
<published>2022-04-20T08:42:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=11a5ebb42ec2ae5a979769e09845e4788e728484'/>
<id>urn:sha1:11a5ebb42ec2ae5a979769e09845e4788e728484</id>
<content type='text'>
Add support for R-Car V4H (R8A779G0) SoC power areas and register
access.

Signed-off-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Link: https://lore.kernel.org/r/20220420084255.375700-10-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>soc: renesas: Identify RZ/G2UL SoC</title>
<updated>2022-04-04T09:01:53Z</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2022-03-15T14:26:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=2f89bef90de4740be33b2cb4ba95e0107df0d25e'/>
<id>urn:sha1:2f89bef90de4740be33b2cb4ba95e0107df0d25e</id>
<content type='text'>
Add support for identifying the RZ/G2UL SoC.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20220315142644.17660-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>soc: renesas: Kconfig: Introduce ARCH_RZG2L config option</title>
<updated>2022-02-24T12:53:25Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2022-02-24T09:21:14Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=088659ad2a830124407edc38da278010c95bcc96'/>
<id>urn:sha1:088659ad2a830124407edc38da278010c95bcc96</id>
<content type='text'>
The Renesas RZ/G2L, RZ/G2LC, RZ/G2UL and RZ/V2L SoCs have identical IP
blocks for which drivers are common.  To avoid updating the Kconfig
files for drivers in common to each SoC, introduce the ARCH_RZG2L config
option.
The ARCH_RZG2L config option will be selected by the above mentioned
SoCs, and the ARCH_RZG2L config option will be used as a dependency for
the drivers in common.

While at it, move PM and PM_GENERIC_DOMAINS under the ARCH_RZG2L config
option instead of keeping it for individual SoCs.

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Reviewed-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20220224092114.25737-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>soc: renesas: Kconfig: Explicitly select PM and PM_GENERIC_DOMAINS configs</title>
<updated>2022-02-22T08:44:15Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2022-02-21T22:24:50Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=b89acaf8cad188d9a1387d3049ae036a10d9a1f3'/>
<id>urn:sha1:b89acaf8cad188d9a1387d3049ae036a10d9a1f3</id>
<content type='text'>
Explicitly select PM and PM_GENERIC_DOMAINS configs for ARCH_R9A07G044
and ARCH_R9A07G054 configs.  PM and PM_GENERIC_DOMAINS configs are
required for RZ/{G2L,V2L} SoC without these configs the SMARC EVK's
won't boot.

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20220221222450.5393-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>soc: renesas: Identify RZ/V2L SoC</title>
<updated>2022-01-24T09:46:15Z</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2022-01-10T13:46:49Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=860122d80251c64484883324128ca82fa35423ef'/>
<id>urn:sha1:860122d80251c64484883324128ca82fa35423ef</id>
<content type='text'>
Add support for identifying the RZ/V2L (R9A07G054) SoC.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20220110134659.30424-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
</feed>
