linux-dev/drivers/staging/mt7621-pci-phy, branch master

staging: mt7621-pci-phy: remove driver from staging

2020-11-30T10:48:24Z

Remove this driver from staging because it has been moved into its properly place in the kernel. Signed-off-by: Sergio Paracuellos Acked-by: Greg Kroah-Hartman Link: https://lore.kernel.org/r/20201121155037.21354-5-sergio.paracuellos@gmail.com Signed-off-by: Vinod Koul

staging: mt7621-pci-phy: dt: bindings: remove bindings txt file

2020-04-13T12:49:17Z

Yaml file for bindings has been properly added. Hence, remove the old txt file. Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20200410091836.13068-3-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: mt7621-pci-phy: dt: bindings: add mediatek, mt7621-pci-phy.yaml

2020-04-13T12:49:17Z

Add bindings to describe Mediatek MT7621 PCIe PHY. Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20200410091836.13068-2-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: mt7621-pci-phy: re-do 'xtal_mode' detection

2020-03-23T10:32:43Z

Detection of the Xtal mode is using magic numbers that can be avoided using properly some definitions and a more accurate variable name from 'reg' into 'xtal_mode'. This increase readability. Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20200321133624.31388-4-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: mt7621-pci-phy: use builtin_platform_driver()

2020-03-23T10:32:42Z

Macro builtin_platform_driver can be used for builtin drivers that don't do anything in driver init. So, use the macro builtin_platform_driver and remove some boilerplate code. Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20200321133624.31388-3-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: mt7621-pci-phy: avoid to create to different phys for a dual port one

2020-03-20T14:10:49Z

This soc has two phy's for the pcie one of them using just a different register for settig it up but sharing all the rest of the config. Until now we was presenting this schema as three different phy's in the device tree using the 'phy-cells' node property to discriminate an index and setting up a complete phy for the dual port index. This sometimes worked properly but reconfiguring the same registers twice presents sometimes some unstable pcie links and the ports was not properly being detected. The problems only appears on hard resets and soft resets was properly working. Instead of having this schema just set two phy's in the device ree and use the 'phy-cells' property to say if the port has or not a dual port. Doing this configuration and set up becomes easier, LOC is decreased and the behaviour also gets deterministic with properly and stable pcie links in both hard and soft resets. Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20200320110123.9907-2-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: mt7621-pci-phy: add 'mt7621_phy_rmw' to simplify code

2020-03-17T13:07:55Z

In order to simplify driver code and decrease a bit LOC add new function 'mt7621_phy_rmw' where clear and set bits are passed as arguments. Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20200315160154.10292-1-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman

staging: mt7621-pci-phy: remove disable clock from the phy exit function

2019-06-21T14:50:10Z

The clock which has been used here is not about the phy but the pcie port. It has been properly handled into host pcie driver code. Hence, remove it from here which is the correct thing to do. Signed-off-by: Sergio Paracuellos Signed-off-by: Greg Kroah-Hartman

staging: mt7621-pci-phy: convert driver to use kernel regmap API's

2019-04-19T13:01:34Z

Instead of using writel and readl use regmap API which makes the driver maintainability easier. Signed-off-by: Sergio Paracuellos Signed-off-by: Greg Kroah-Hartman

staging: mt7621-pci-phy: add quirks for 'E2' revision using 'soc_device_attribute'

2019-04-19T13:01:34Z

Depending on revision of the chip, 'mt7621_bypass_pipe_rst' function must be executed. Add better support for this using 'soc_device_match' in driver probe function. Signed-off-by: Sergio Paracuellos Signed-off-by: Greg Kroah-Hartman