linux-dev/include/asm-ppc/reg_booke.h, branch master

powerpc: Remove arch/ppc and include/asm-ppc

2008-06-10T11:40:22Z

All the maintained platforms are now in arch/powerpc, so the old arch/ppc stuff can now go away. Acked-by: Adrian Bunk Acked-by: Arnd Bergmann Acked-by: Becky Bruce Acked-by: Benjamin Herrenschmidt Acked-by: Geert Uytterhoeven Acked-by: Grant Likely Acked-by: Jochen Friedrich Acked-by: John Linn Acked-by: Jon Loeliger Acked-by: Josh Boyer Acked-by: Kumar Gala Acked-by: Olof Johansson Acked-by: Peter Korsgaard Acked-by: Scott Wood Acked-by: Sean MacLennan Acked-by: Segher Boessenkool Acked-by: Stefan Roese Acked-by: Stephen Neuendorffer Acked-by: Wolfgang Denk Signed-off-by: Paul Mackerras

[PPC] Remove 85xx from arch/ppc

2008-01-28T14:33:10Z

85xx exists in arch/powerpc as well as cuImage support to boot from a u-boot that doesn't support device trees. Signed-off-by: Kumar Gala

[POWERPC] Reworking machine check handling and Fix 440/440A

2007-12-23T19:11:59Z

This adds a cputable function pointer for the CPU-side machine check handling. The semantic is still the same as the old one, the one in ppc_md. overrides the one in cputable, though ultimately we'll want to change that so the CPU gets first. This removes CONFIG_440A which was a problem for multiplatform kernels and instead fixes up the IVOR at runtime from a setup_cpu function. The "A" version of the machine check also tweaks the regs->trap value to differenciate the 2 versions at the C level. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Josh Boyer

[POWERPC] include/asm-ppc/: Spelling fixes

2007-12-20T05:17:49Z

Signed-off-by: Joe Perches Signed-off-by: Paul Mackerras

[POWERPC] Compile fixes for arch/powerpc dcr code

2007-02-07T03:03:23Z

The new dcr code does not currently compile when configured for native DCR access on ARCH=powerpc. This patch fixes the problems. Signed-off-by: David Gibson Signed-off-by: Paul Mackerras

[POWERPC] Only export mtdcr/mfdcr if CONFIG_PPC_DCR is set

2006-12-11T05:15:47Z

On 85xx we don't build in dcr support because the core doesn't implement the instructions. This caused problems when building an 85xx kernel. Additionally made it so we only build __mtdcr/__mfdcr if we are CONFIG_PPC_DCR_NATIVE. The 85xx build issue wasPointed out by Dai Haruki. Signed-off-by: Kumar Gala

[POWERPC] 40x: Fix debug status register defines

2006-09-21T12:59:39Z

This fixes some debug register defines on PPC 40x that were incorrect. Signed-off-by: Josh Boyer Signed-off-by: Paul Mackerras

[PATCH] ppc32: add 440GX erratum 440_43 workaround

2006-04-28T11:04:56Z

This patch adds workaround for PPC 440GX erratum 440_43. According to this erratum spurious MachineChecks (caused by L1 cache parity) can happen during DataTLB miss processing. We disable L1 cache parity checking for 440GX rev.C and rev.F Signed-off-by: Eugene Surovegin Signed-off-by: Paul Mackerras

[PATCH] ppc32: Add support for Freescale e200 (Book-E) core

2005-06-25T23:24:26Z

The e200 core is a Book-E core (similar to e500) that has a unified L1 cache and is not cache coherent on the bus. The e200 core also adds a separate exception level for debug exceptions. Part of this patch helps to cleanup a few cases that are true for all Freescale Book-E parts, not just e500. Signed-off-by: Kim Phillips Signed-off-by: Kumar Gala Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

[PATCH] ppc32: refactor FPU exception handling

2005-05-01T15:58:40Z

Moved common FPU exception handling code out of head.S so it can be used by several of the sub-architectures that might of a full PowerPC FPU. Also, uses new CONFIG_PPC_FPU define to fix alignment exception handling for floating point load/store instructions to only occur if we have a hardware FPU. Signed-off-by: Jason McMullan Signed-off-by: Kumar Gala Signed-off-by: Paul Mackerras Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds