<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/include/dt-bindings/pinctrl, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/include/dt-bindings/pinctrl?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/include/dt-bindings/pinctrl?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2022-05-19T13:11:15Z</updated>
<entry>
<title>dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings</title>
<updated>2022-05-19T13:11:15Z</updated>
<author>
<name>AngeloGioacchino Del Regno</name>
<email>angelogioacchino.delregno@collabora.com</email>
</author>
<published>2022-05-17T08:39:56Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=81557a71564a8c44ee5b9262d08438b0170a25f3'/>
<id>urn:sha1:81557a71564a8c44ee5b9262d08438b0170a25f3</id>
<content type='text'>
Add devicetree and pinfunc bindings for MediaTek Helio X10 MT6795.

Signed-off-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20220517083957.11816-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2022-03-28T18:52:53Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-03-28T18:52:53Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=ff61bc81b3feebcef4d0431a92e2e40e8d4fe8b3'/>
<id>urn:sha1:ff61bc81b3feebcef4d0431a92e2e40e8d4fe8b3</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "No core changes this time. Just new driver code and improvements!

  New drivers:

   - New driver for the Broadcom BCM4908 SoC.

   - New subdriver for Tesla FSD (Full Self Driving) SoC, a derivative
     of the Samsung Exynos pin control driver.

   - New driver for the Amlogic Meson S4 SoC.

   - New driver for the Sunplus SP7021 SoC.

   - New driver for the Microsemi Ocelot family ServalT SoC.

   - New subdriver for Intel Alder Lake-M SoC.

   - New subdriver for Intel Ice Lake-N SoC, including PCH support.

   - New subdriver for Renesas R8A779F0 SoC.

   - New subdriver for Mediatek MT8186 SoC.

   - New subdriver for NXP Freescale i.MX93 SoC.

   - New driver for Nuvoton WPCM450 SoC.

   - New driver for Qualcomm SC8280XP SoC.

  Improvements:

   - Wakeup support on Samsung Exynos850 and ExynosAutov9.

   - Serious and voluminous maintenance cleanup and refactoring in the
     Renesas drivers. Mainly sharing similar data between the different
     SoC subdrivers.

   - Qualcomm SM8450 EGPIO support.

   - Drive strength support on the Mediatek MT8195.

   - Add some missing groups and functions to the Ralink RT2880"

* tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (188 commits)
  pinctrl: mediatek: common-v1: fix semicolon.cocci warnings
  pinctrl: nuvoton: wpcm450: Fix build error without OF
  pinctrl: qcom-pmic-gpio: Add support for pm8450
  dt-bindings: pinctrl: aspeed: Update gfx node in example
  dt-bindings: pinctrl: rt2880: add missing pin groups and functions
  pinctrl: ingenic: Fix regmap on X series SoCs
  pinctrl: nuvoton: Fix return value check in wpcm450_gpio_register()
  pinctrl: nuvoton: wpcm450: off by one in wpcm450_gpio_register()
  pinctrl: nuvoton: wpcm450: select GENERIC_PINCTRL_GROUPS
  pinctrl: nuvoton: Fix sparse warning
  pinctrl: mediatek: mt8186: Account for probe refactoring
  pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callback
  pinctrl: mediatek: common-v1: Commonize spec_pupd callback
  pinctrl: mediatek: common-v1: Use common probe function
  pinctrl: mediatek: common-v1: Add common probe function
  pinctrl: mediatek: paris: Unify probe function by using OF match data
  pinctrl/rockchip: Add missing of_node_put() in rockchip_pinctrl_probe
  pinctrl: nomadik: Add missing of_node_put() in nmk_pinctrl_probe
  pinctrl: berlin: fix error return code of berlin_pinctrl_build_state()
  pinctrl: qcom: Introduce sc8280xp TLMM driver
  ...
</content>
</entry>
<entry>
<title>dt-bindings: pinctrl: mt8186: add pinctrl file and binding document</title>
<updated>2022-03-15T00:00:03Z</updated>
<author>
<name>Guodong Liu</name>
<email>guodong.liu@mediatek.com</email>
</author>
<published>2022-02-16T03:21:22Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=338e953f1bd1a0ef4c86b5ab44735e1f6519d721'/>
<id>urn:sha1:338e953f1bd1a0ef4c86b5ab44735e1f6519d721</id>
<content type='text'>
1. This patch adds pinctrl file for mt8186.
2. This patch adds mt8186 compatible node in binding document.

Signed-off-by: Guodong Liu &lt;guodong.liu@mediatek.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20220216032124.28067-2-guodong.liu@mediatek.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62</title>
<updated>2022-02-28T11:34:43Z</updated>
<author>
<name>Suman Anna</name>
<email>s-anna@ti.com</email>
</author>
<published>2022-02-25T12:02:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e096242e1ee2e800df5e8d9a5508135902e8e1b5'/>
<id>urn:sha1:e096242e1ee2e800df5e8d9a5508135902e8e1b5</id>
<content type='text'>
Add pinctrl macros for AM62x SoCs. These macro definitions are similar
to that of previous platforms, but adding new definitions to avoid any
naming confusions in the SoC dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.

Signed-off-by: Suman Anna &lt;s-anna@ti.com&gt;
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Bryan Brattlof &lt;bb@ti.com&gt;
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Link: https://lore.kernel.org/r/20220225120239.1303821-4-vigneshr@ti.com
</content>
</entry>
<entry>
<title>dt-bindings: pinctrl: Add dt-bindings for Sunplus SP7021</title>
<updated>2022-01-30T01:55:41Z</updated>
<author>
<name>Wells Lu</name>
<email>wellslutw@gmail.com</email>
</author>
<published>2022-01-16T14:52:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=340407d214e4566c8a5d6997b7ca5ec21c7077a8'/>
<id>urn:sha1:340407d214e4566c8a5d6997b7ca5ec21c7077a8</id>
<content type='text'>
Add dt-bindings header files and documentation for Sunplus SP7021 SoC.

Signed-off-by: Wells Lu &lt;wellslutw@gmail.com&gt;
Link: https://lore.kernel.org/r/1642344734-27229-2-git-send-email-wellslutw@gmail.com
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2022-01-10T16:32:37Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-01-10T16:32:37Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=bb4ed26e7e837ca3034d4105491436d54c430038'/>
<id>urn:sha1:bb4ed26e7e837ca3034d4105491436d54c430038</id>
<content type='text'>
Pull RISC-V SoC updates from Arnd Bergmann:
 "Add support for StarFive JH7100 RISC-V SoC

  This adds support for the StarFive JH7100, including the necessary
  device drivers and DT files for the BeagleV Starlight prototype board,
  with additional boards to be added later. This SoC promises to be the
  first usable low-cost platform for RISC-V.

  I've taken this through the SoC tree in the anticipation of adding a
  few other Arm based SoCs as well, but those did not pass the review in
  time, so it's only this one"

* tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  reset: starfive-jh7100: Fix 32bit compilation
  RISC-V: Add BeagleV Starlight Beta device tree
  RISC-V: Add initial StarFive JH7100 device tree
  serial: 8250_dw: Add StarFive JH7100 quirk
  dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts
  pinctrl: starfive: Add pinctrl driver for StarFive SoCs
  dt-bindings: pinctrl: Add StarFive JH7100 bindings
  dt-bindings: pinctrl: Add StarFive pinctrl definitions
  reset: starfive-jh7100: Add StarFive JH7100 reset driver
  dt-bindings: reset: Add Starfive JH7100 reset bindings
  dt-bindings: reset: Add StarFive JH7100 reset definitions
  clk: starfive: Add JH7100 clock generator driver
  dt-bindings: clock: starfive: Add JH7100 bindings
  dt-bindings: clock: starfive: Add JH7100 clock definitions
  dt-bindings: interrupt-controller: Add StarFive JH7100 plic
  dt-bindings: timer: Add StarFive JH7100 clint
  RISC-V: Add StarFive SoC Kconfig option
</content>
</entry>
<entry>
<title>Merge tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt</title>
<updated>2021-12-20T15:13:26Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2021-12-20T15:13:25Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0fd319105fde3a6a0f8cc929bf46d1d6595c0984'/>
<id>urn:sha1:0fd319105fde3a6a0f8cc929bf46d1d6595c0984</id>
<content type='text'>
Samsung DTS ARM64 changes for v5.17

1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink
   E850-96 board and WinLink vendor prefix.
2. Add pinctrl definitions used for Exynos850.
3. Minor fixes and improvements.
4. Convert serial on ExynosAutov9 to new hierarchy where serial is part
   of USI node.

* tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
  dt-bindings: arm: samsung: Document E850-96 board binding
  dt-bindings: Add vendor prefix for WinLink
  dt-bindings: arm: samsung: document jackpotlte board binding
  dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example
  arm64: dts: exynos: convert serial_0 to USI on ExynosAutov9
  dt-bindings: soc: samsung: Add Exynos USI bindings
  arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7

Link: https://lore.kernel.org/r/20211220115530.30961-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850</title>
<updated>2021-12-20T09:35:32Z</updated>
<author>
<name>Sam Protsenko</name>
<email>semen.protsenko@linaro.org</email>
</author>
<published>2021-12-17T16:15:47Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=51b1a5729469cef57a3c97aa014aa6e1d2b8d864'/>
<id>urn:sha1:51b1a5729469cef57a3c97aa014aa6e1d2b8d864</id>
<content type='text'>
All Exynos850 GPIO blocks can use EXYNOS5420_PIN_DRV* definitions,
except GPIO_HSI block. Add pin drive strength definitions for GPIO_HSI
block correspondingly.

Signed-off-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20211217161549.24836-6-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: pinctrl: Add StarFive pinctrl definitions</title>
<updated>2021-12-16T16:24:23Z</updated>
<author>
<name>Emil Renner Berthing</name>
<email>kernel@esmil.dk</email>
</author>
<published>2021-07-06T18:19:06Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3021114b3d172cf80c074c81425741f9e26c6679'/>
<id>urn:sha1:3021114b3d172cf80c074c81425741f9e26c6679</id>
<content type='text'>
Add definitons for pins and GPIO input, output and output enable
signals on the StarFive JH7100 SoC.

Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Emil Renner Berthing &lt;kernel@esmil.dk&gt;
</content>
</entry>
<entry>
<title>dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2</title>
<updated>2021-12-13T17:51:21Z</updated>
<author>
<name>Aswath Govindraju</name>
<email>a-govindraju@ti.com</email>
</author>
<published>2021-12-07T08:09:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=beba81faad86fc2bad567b1c029d6a000a43ca78'/>
<id>urn:sha1:beba81faad86fc2bad567b1c029d6a000a43ca78</id>
<content type='text'>
Add pinctrl macros for J721S2 SoC. These macro definitions are
similar to that of J721E, but adding new definitions to avoid
any naming confusions in the soc dts files.

checkpatch insists the following error exists:
ERROR: Macros with complex values should be enclosed in parentheses

However, we do not need parentheses enclosing the values for this
macro as we do intend it to generate two separate values as has been
done for other similar platforms.

Signed-off-by: Aswath Govindraju &lt;a-govindraju@ti.com&gt;
Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Reviewed-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20211207080904.14324-3-a-govindraju@ti.com
</content>
</entry>
</feed>
