linux-dev/include/linux/soc/mediatek, branch linus/master

Merge tag 'arm-soc-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2022-05-26T17:25:22Z

Pull 32-bit ARM SoC updates from Arnd Bergmann: "These updates are for platform specific code in arch/arm/, mostly fixing minor issues. The at91 platform gains support for better power management on the lan966 platform and new firmware on the sama5 platform. The mediatek soc drivers in turn are enabled for the new mt8195 SoC" * tag 'arm-soc-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (34 commits) ARM: at91: debug: add lan966 support ARM: at91: pm: add support for sama5d2 secure suspend ARM: at91: add code to handle secure calls ARM: at91: Kconfig: implement PIT64B selection ARM: at91: pm: add quirks for pm ARM: at91: pm: use kernel documentation style ARM: at91: pm: introduce macros for pm mode replacement ARM: at91: pm: keep documentation inline with structure members orion5x: fix typos in comments ARM: hisi: Add missing of_node_put after of_find_compatible_node ARM: shmobile: rcar-gen2: Drop comma after OF match table sentinel ARM: shmobile: Drop commas after dt_compat sentinels soc: mediatek: mutex: remove mt8195 MOD0 and SOF0 definition MAINTAINERS: Add Broadcom BCMBCA entry arm: bcmbca: add arch bcmbca machine entry MAINTAINERS: Broadcom internal lists aren't maintainers dt-bindings: pwrap: mediatek: Update pwrap document for mt8195 soc: mediatek: add DDP_DOMPONENT_DITHER0 enum for mt8195 vdosys0 soc: mediatek: add mtk-mutex support for mt8195 vdosys0 soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 ...

Merge tag 'v5.18-next-vdso0-stable-tag' into v5.18-next/soc

2022-04-22T12:39:59Z

soc: mediatek: add DDP_DOMPONENT_DITHER0 enum for mt8195 vdosys0

2022-04-22T12:38:53Z

The mmsys routing table of mt8195 vdosys0 has 2 DITHER components, so mmsys need to add DDP_COMPONENT_DITHER1 and change all usages of DITHER enum form DDP_COMPONENT_DITHER to DDP_COMPONENT_DITHER0. But its header need to keep DDP_COMPONENT_DITHER enum until drm/mediatek also changed it. Signed-off-by: jason-jh.lin Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rex-BC Chen Link: https://lore.kernel.org/r/20220419094143.9561-7-jason-jh.lin@mediatek.com Signed-off-by: Matthias Brugger

soc: mediatek: add mtk-mmsys support for mt8195 vdosys0

2022-04-22T12:38:52Z

1. Add mt8195 mmsys compatible for 2 vdosys. 2. Add io_start into each driver data of mt8195 vdosys. 3. Add get match data function to identify mmsys by io_start. 4. Add mt8195 routing table settings of vdosys0. Signed-off-by: jason-jh.lin Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rex-BC Chen Reviewed-by: CK Hu Link: https://lore.kernel.org/r/20220419094143.9561-2-jason-jh.lin@mediatek.com Signed-off-by: Matthias Brugger

soc: mediatek: cmdq: Use mailbox rx_callback instead of cmdq_task_cb

2022-04-20T12:14:59Z

rx_callback is a standard mailbox callback mechanism and could cover the function of proprietary cmdq_task_cb, so use the standard one instead of the proprietary one. Client has changed to use the standard callback machanism and sync dma buffer in client driver, so remove the proprietary callback in cmdq helper. Signed-off-by: Chun-Kuang Hu Reviewed-by: jason-jh.lin Tested-by: jason-jh.lin Link: https://lore.kernel.org/r/1650102868-26219-1-git-send-email-chunkuang.hu@kernel.org Signed-off-by: Matthias Brugger

net: ethernet: mtk_eth_soc: add support for Wireless Ethernet Dispatch (WED)

2022-04-06T13:08:49Z

The Wireless Ethernet Dispatch subsystem on the MT7622 SoC can be configured to intercept and handle access to the DMA queues and PCIe interrupts for a MT7615/MT7915 wireless card. It can manage the internal WDMA (Wireless DMA) controller, which allows ethernet packets to be passed from the packet switch engine (PSE) to the wireless card, bypassing the CPU entirely. This can be used to implement hardware flow offloading from ethernet to WLAN. Signed-off-by: Felix Fietkau Signed-off-by: David S. Miller

soc: mediatek: mtk-infracfg: Disable ACP on MT8192

2022-03-01T07:21:28Z

MT8192 contains an experimental Accelerator Coherency Port implementation, which does not work correctly but was unintentionally enabled by default. For correct operation of the GPU, we must set a chicken bit disabling ACP on MT8192. Adapted from the following downstream change to the out-of-tree, legacy Mali GPU driver: https://chromium-review.googlesource.com/c/chromiumos/third_party/kernel/+/2781271/5 Note this change is required for both Panfrost and the legacy kernel driver. Co-developed-by: Robin Murphy Signed-off-by: Robin Murphy Signed-off-by: Alyssa Rosenzweig Cc: Nick Fan Cc: Nicolas Boichat Cc: Chen-Yu Tsai Cc: Stephen Boyd Cc: AngeloGioacchino Del Regno Tested-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20220215184651.12168-1-alyssa.rosenzweig@collabora.com Signed-off-by: Matthias Brugger

soc: mediatek: pm-domains: Add support for mt8186

2022-02-28T11:02:11Z

Add power domain control data in mt8186. Signed-off-by: Chun-Jie Chen Link: https://lore.kernel.org/r/20220215104917.5726-3-chun-jie.chen@mediatek.com Signed-off-by: Matthias Brugger

soc: mediatek: pm-domains: Add support for mt8195

2022-02-28T11:02:04Z

Add domain control data including bus protection data size change due to more protection steps in mt8195. Signed-off-by: Chun-Jie Chen Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20220130012104.5292-6-chun-jie.chen@mediatek.com Signed-off-by: Matthias Brugger

soc: mediatek: mmsys: add comp OVL_2L2/POSTMASK/RDMA4

2021-09-13T08:52:12Z

This patch add some more ddp component OVL_2L2 is ovl which include 2 layers overlay POSTMASK control round corner for display frame RDMA4 read dma buffer Signed-off-by: Yongqiang Niu Reviewed-by: Chun-Kuang Hu Reviewed-by: Enric Balletbo i Serra Link: https://lore.kernel.org/r/1627894773-23872-2-git-send-email-yongqiang.niu@mediatek.com Signed-off-by: Matthias Brugger