<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/include/uapi/rdma/hns-abi.h, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/include/uapi/rdma/hns-abi.h?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/include/uapi/rdma/hns-abi.h?h=master'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2021-12-14T23:59:07Z</updated>
<entry>
<title>RDMA/hns: Support direct wqe of userspace</title>
<updated>2021-12-14T23:59:07Z</updated>
<author>
<name>Yixing Liu</name>
<email>liuyixing1@huawei.com</email>
</author>
<published>2021-12-07T12:49:01Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0045e0d3f42ed7d05434bb5bc16acfc793ea4891'/>
<id>urn:sha1:0045e0d3f42ed7d05434bb5bc16acfc793ea4891</id>
<content type='text'>
The current write wqe mechanism is to write to DDR first, and then notify
the hardware through doorbell to read the data. Direct wqe is a mechanism
to fill wqe directly into the hardware. In the case of light load, the wqe
will be filled into pcie bar space of the hardware, this will reduce one
memory access operation and therefore reduce the latency. SIMD
instructions allows cpu to write the 512 bits at one time to device
memory, thus it can be used for posting direct wqe.

Add direct wqe enable switch and address mapping.

Link: https://lore.kernel.org/r/20211207124901.42123-2-liangwenpeng@huawei.com
Signed-off-by: Yixing Liu &lt;liuyixing1@huawei.com&gt;
Signed-off-by: Wenpeng Liang &lt;liangwenpeng@huawei.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/hns: Add support for XRC on HIP09</title>
<updated>2021-03-11T23:51:27Z</updated>
<author>
<name>Wenpeng Liang</name>
<email>liangwenpeng@huawei.com</email>
</author>
<published>2021-03-04T02:55:58Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=32548870d438aba3c4a13f07efb73a8b86de507d'/>
<id>urn:sha1:32548870d438aba3c4a13f07efb73a8b86de507d</id>
<content type='text'>
The HIP09 supports XRC transport service, it greatly saves the number of
QPs required to connect all processes in a large cluster.

Link: https://lore.kernel.org/r/1614826558-35423-1-git-send-email-liweihang@huawei.com
Signed-off-by: Wenpeng Liang &lt;liangwenpeng@huawei.com&gt;
Signed-off-by: Weihang Li &lt;liweihang@huawei.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/hns: Move capability flags of QP and CQ to hns-abi.h</title>
<updated>2020-12-07T19:48:51Z</updated>
<author>
<name>Weihang Li</name>
<email>liweihang@huawei.com</email>
</author>
<published>2020-12-02T01:29:20Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=53ef4999f07d9c75cdc8effb0cc8c581dc39b1a1'/>
<id>urn:sha1:53ef4999f07d9c75cdc8effb0cc8c581dc39b1a1</id>
<content type='text'>
These flags will be returned to the userspace through ABI, so they should
be defined in hns-abi.h. Furthermore, there is no need to include
hns-abi.h in every source files, it just needs to be included in the
common header file.

Link: https://lore.kernel.org/r/1606872560-17823-1-git-send-email-liweihang@huawei.com
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Signed-off-by: Weihang Li &lt;liweihang@huawei.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/hns: Add support for CQE in size of 64 Bytes</title>
<updated>2020-09-24T18:35:11Z</updated>
<author>
<name>Wenpeng Liang</name>
<email>liangwenpeng@huawei.com</email>
</author>
<published>2020-09-16T08:43:24Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=09a5f210f67eea4a2176820c3bc398747a564705'/>
<id>urn:sha1:09a5f210f67eea4a2176820c3bc398747a564705</id>
<content type='text'>
The new version of RoCEE supports using CQE in size of 32B or 64B. The
performance of bus can be improved by using larger size of CQE.

Link: https://lore.kernel.org/r/1600245806-56321-3-git-send-email-liweihang@huawei.com
Signed-off-by: Wenpeng Liang &lt;liangwenpeng@huawei.com&gt;
Signed-off-by: Weihang Li &lt;liweihang@huawei.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
<entry>
<title>RDMA/hns: Update the kernel header file of hns</title>
<updated>2019-01-25T16:55:48Z</updated>
<author>
<name>Lijun Ou</name>
<email>oulijun@huawei.com</email>
</author>
<published>2019-01-23T02:09:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=9d9d4ff788845fad1626b80164e43a1f0f17ccbc'/>
<id>urn:sha1:9d9d4ff788845fad1626b80164e43a1f0f17ccbc</id>
<content type='text'>
The hns_roce_ib_create_srq_resp is used to interact with the user for
data, this was open coded to use a u32 directly, instead use a properly
sized structure.

Fixes: c7bcb13442e1 ("RDMA/hns: Add SRQ support for hip08 kernel mode")
Signed-off-by: Lijun Ou &lt;oulijun@huawei.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@mellanox.com&gt;
</content>
</entry>
<entry>
<title>RDMA/hns: Add SRQ support for hip08 kernel mode</title>
<updated>2018-12-05T14:59:13Z</updated>
<author>
<name>Lijun Ou</name>
<email>oulijun@huawei.com</email>
</author>
<published>2018-11-24T08:49:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c7bcb13442e1bd8a4cc41c74540dd2e2f7058d16'/>
<id>urn:sha1:c7bcb13442e1bd8a4cc41c74540dd2e2f7058d16</id>
<content type='text'>
This patch implements the SRQ(Share Receive Queue) verbs
and update the poll cq verbs to deal with SRQ complentions.

Signed-off-by: Lijun Ou &lt;oulijun@huawei.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@mellanox.com&gt;
</content>
</entry>
<entry>
<title>RDMA/hns: Support flush cqe for hip08 in kernel space</title>
<updated>2018-08-03T02:03:25Z</updated>
<author>
<name>Yixian Liu</name>
<email>liuyixian@huawei.com</email>
</author>
<published>2018-08-02T02:38:05Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0425e3e6e0c7f92f2c2a396d902871b7a81da0eb'/>
<id>urn:sha1:0425e3e6e0c7f92f2c2a396d902871b7a81da0eb</id>
<content type='text'>
According to IB protocol, there are some cases that work requests must
return the flush error completion status through the completion queue. Due
to hardware limitation, the driver needs to assist the flush process.

This patch adds the support of flush cqe for hip08 in the cases that
needed, such as poll cqe, post send, post recv and aeqe handle.

The patch also considered the compatibility between kernel and user space.

Signed-off-by: Yixian Liu &lt;liuyixian@huawei.com&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@mellanox.com&gt;
</content>
</entry>
<entry>
<title>uapi: Fix SPDX tags for files referring to the 'OpenIB.org' license</title>
<updated>2018-04-23T15:10:33Z</updated>
<author>
<name>Jason Gunthorpe</name>
<email>jgg@mellanox.com</email>
</author>
<published>2018-04-20T15:49:10Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d50e14abe2d0024aa527b89c7990147df5d531a5'/>
<id>urn:sha1:d50e14abe2d0024aa527b89c7990147df5d531a5</id>
<content type='text'>
Based on discussion with Kate Stewart this license is not a
BSD-2-Clause, but is now formally identified as Linux-OpenIB
by SPDX.

The key difference between the licenses is in the 'warranty'
paragraph.

if_infiniband.h refers to the 'OpenIB.org' license, but
does not include the text, instead it links to an obsolete
web site that contains a license that matches the BSD-2-Clause
SPX. There is no 'three clause' version of the OpenIB.org
license.

Signed-off-by: Jason Gunthorpe &lt;jgg@mellanox.com&gt;
Acked-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Doug Ledford &lt;dledford@redhat.com&gt;
</content>
</entry>
<entry>
<title>RDMA: Change all uapi headers to use __aligned_u64 instead of __u64</title>
<updated>2018-03-27T20:25:09Z</updated>
<author>
<name>Jason Gunthorpe</name>
<email>jgg@mellanox.com</email>
</author>
<published>2018-03-20T20:19:51Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=26b9906612c3553189d7d1673ee116ffac474d53'/>
<id>urn:sha1:26b9906612c3553189d7d1673ee116ffac474d53</id>
<content type='text'>
The new auditing standard for the subsystem will be to only use
__aligned_64 in uapi headers to try and prevent 32/64 compat bugs
from existing in the future.

Changing all existing usage will help ensure new developers copy the
right idea.

The before/after of this patch was tested using pahole on 32 and 64
bit compiles to confirm it has no change in the structure layout, so
this patch is a NOP.

Signed-off-by: Jason Gunthorpe &lt;jgg@mellanox.com&gt;
</content>
</entry>
<entry>
<title>RDMA/hns: Use structs to describe the uABI instead of opencoding</title>
<updated>2018-03-15T21:58:04Z</updated>
<author>
<name>Jason Gunthorpe</name>
<email>jgg@mellanox.com</email>
</author>
<published>2018-03-14T20:39:42Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=633fb4d9fdaa613308c136293107f28e08e85d25'/>
<id>urn:sha1:633fb4d9fdaa613308c136293107f28e08e85d25</id>
<content type='text'>
Open coding a loose value is not acceptable for describing the uABI in
RDMA. Provide the missing struct.

Signed-off-by: Jason Gunthorpe &lt;jgg@mellanox.com&gt;
</content>
</entry>
</feed>
