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<title>linux-dev/kernel/dma/Kconfig, branch master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/kernel/dma/Kconfig?h=master</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/kernel/dma/Kconfig?h=master'/>
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<updated>2022-03-03T11:00:57Z</updated>
<entry>
<title>dma-mapping: remove CONFIG_DMA_REMAP</title>
<updated>2022-03-03T11:00:57Z</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2022-02-26T15:40:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f5ff79fddf0efecca538046b5cc20fb3ded2ec4f'/>
<id>urn:sha1:f5ff79fddf0efecca538046b5cc20fb3ded2ec4f</id>
<content type='text'>
CONFIG_DMA_REMAP is used to build a few helpers around the core
vmalloc code, and to use them in case there is a highmem page in
dma-direct, and to make dma coherent allocations be able to use
non-contiguous pages allocations for DMA allocations in the dma-iommu
layer.

Right now it needs to be explicitly selected by architectures, and
is only done so by architectures that require remapping to deal
with devices that are not DMA coherent.  Make it unconditional for
builds with CONFIG_MMU as it is very little extra code, but makes
it much more likely that large DMA allocations succeed on x86.

This fixes hot plugging a NVMe thunderbolt SSD for me, which tries
to allocate a 1MB buffer that is otherwise hard to obtain due to
memory fragmentation on a heavily used laptop.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Reviewed-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'stable/for-linus-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/swiotlb</title>
<updated>2021-09-03T17:34:44Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2021-09-03T17:34:44Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=3de18c865f504ab59ed2588b1e11acd4bcb9ea09'/>
<id>urn:sha1:3de18c865f504ab59ed2588b1e11acd4bcb9ea09</id>
<content type='text'>
Pull swiotlb updates from Konrad Rzeszutek Wilk:
 "A new feature called restricted DMA pools. It allows SWIOTLB to
  utilize per-device (or per-platform) allocated memory pools instead of
  using the global one.

  The first big user of this is ARM Confidential Computing where the
  memory for DMA operations can be set per platform"

* 'stable/for-linus-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/konrad/swiotlb: (23 commits)
  swiotlb: use depends on for DMA_RESTRICTED_POOL
  of: restricted dma: Don't fail device probe on rmem init failure
  of: Move of_dma_set_restricted_buffer() into device.c
  powerpc/svm: Don't issue ultracalls if !mem_encrypt_active()
  s390/pv: fix the forcing of the swiotlb
  swiotlb: Free tbl memory in swiotlb_exit()
  swiotlb: Emit diagnostic in swiotlb_exit()
  swiotlb: Convert io_default_tlb_mem to static allocation
  of: Return success from of_dma_set_restricted_buffer() when !OF_ADDRESS
  swiotlb: add overflow checks to swiotlb_bounce
  swiotlb: fix implicit debugfs declarations
  of: Add plumbing for restricted DMA pool
  dt-bindings: of: Add restricted DMA pool
  swiotlb: Add restricted DMA pool initialization
  swiotlb: Add restricted DMA alloc/free support
  swiotlb: Refactor swiotlb_tbl_unmap_single
  swiotlb: Move alloc_size to swiotlb_find_slots
  swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing
  swiotlb: Update is_swiotlb_active to add a struct device argument
  swiotlb: Update is_swiotlb_buffer to add a struct device argument
  ...
</content>
</entry>
<entry>
<title>swiotlb: use depends on for DMA_RESTRICTED_POOL</title>
<updated>2021-08-31T18:48:14Z</updated>
<author>
<name>Claire Chang</name>
<email>tientzu@chromium.org</email>
</author>
<published>2021-08-27T03:48:02Z</published>
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<id>urn:sha1:f3c4b1341e8320e63f197a554fc5a25686a11d22</id>
<content type='text'>
Use depends on instead of select for DMA_RESTRICTED_POOL; otherwise it
will make SWIOTLB user configurable and cause compile errors for some
arch (e.g. mips).

Fixes: 0b84e4f8b793 ("swiotlb: Add restricted DMA pool initialization")
Acked-by: Will Deacon &lt;will@kernel.org&gt;
Reported-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Signed-off-by: Claire Chang &lt;tientzu@chromium.org&gt;
Signed-off-by: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
</content>
</entry>
<entry>
<title>dma-direct: add support for dma_coherent_default_memory</title>
<updated>2021-08-18T14:24:09Z</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2021-06-23T12:21:16Z</published>
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<id>urn:sha1:faf4ef823ac5f3b6a34a73b76c52895dee3dce55</id>
<content type='text'>
Add an option to allocate uncached memory for dma_alloc_coherent from
the global dma_coherent_default_memory.  This will allow to move
arm-nommu (and eventually other platforms) to use generic code for
allocating uncached memory from a pre-populated pool.

Note that this is a different pool from the one that platforms that
can remap at runtime use for GFP_ATOMIC allocations for now, although
there might be opportunities to eventually end up with a common codebase
for the two use cases.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Tested-by: Dillon Min &lt;dillon.minfei@gmail.com&gt;
</content>
</entry>
<entry>
<title>swiotlb: Add restricted DMA pool initialization</title>
<updated>2021-07-14T00:04:50Z</updated>
<author>
<name>Claire Chang</name>
<email>tientzu@chromium.org</email>
</author>
<published>2021-06-19T03:40:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=0b84e4f8b793eb4045fd64f6f514165a7974cd16'/>
<id>urn:sha1:0b84e4f8b793eb4045fd64f6f514165a7974cd16</id>
<content type='text'>
Add the initialization function to create restricted DMA pools from
matching reserved-memory nodes.

Regardless of swiotlb setting, the restricted DMA pool is preferred if
available.

The restricted DMA pools provide a basic level of protection against the
DMA overwriting buffer contents at unexpected times. However, to protect
against general data leakage and system memory corruption, the system
needs to provide a way to lock down the memory access, e.g., MPU.

Signed-off-by: Claire Chang &lt;tientzu@chromium.org&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Tested-by: Stefano Stabellini &lt;sstabellini@kernel.org&gt;
Tested-by: Will Deacon &lt;will@kernel.org&gt;
Signed-off-by: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
</content>
</entry>
<entry>
<title>driver core: lift dma_default_coherent into common code</title>
<updated>2021-02-13T08:51:45Z</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2021-02-10T09:56:39Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=6d4e9a8efe3d59f31367d79e970c2f328da139a4'/>
<id>urn:sha1:6d4e9a8efe3d59f31367d79e970c2f328da139a4</id>
<content type='text'>
Lift the dma_default_coherent variable from the mips architecture code
to the driver core.  This allows an architecture to sdefault all device
to be DMA coherent at run time, even if the kernel is build with support
for DMA noncoherent device.  By allowing device_initialize to set the
-&gt;dma_coherent field to this default the amount of arch hooks required
for this behavior can be greatly reduced.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Acked-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'dma-mapping-5.11' of git://git.infradead.org/users/hch/dma-mapping</title>
<updated>2020-12-22T21:19:43Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-12-22T21:19:43Z</published>
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<id>urn:sha1:347d81b68b8f7044c9ce3fefa130a736ca916176</id>
<content type='text'>
Pull dma-mapping updates from Christoph Hellwig:

 - support for a partial IOMMU bypass (Alexey Kardashevskiy)

 - add a DMA API benchmark (Barry Song)

 - misc fixes (Tiezhu Yang, tangjianqiang)

* tag 'dma-mapping-5.11' of git://git.infradead.org/users/hch/dma-mapping:
  selftests/dma: add test application for DMA_MAP_BENCHMARK
  dma-mapping: add benchmark support for streaming DMA APIs
  dma-contiguous: fix a typo error in a comment
  dma-pool: no need to check return value of debugfs_create functions
  powerpc/dma: Fallback to dma_ops when persistent memory present
  dma-mapping: Allow mixing bypass and mapped DMA operation
</content>
</entry>
<entry>
<title>dma-mapping: add benchmark support for streaming DMA APIs</title>
<updated>2020-11-27T09:33:42Z</updated>
<author>
<name>Barry Song</name>
<email>song.bao.hua@hisilicon.com</email>
</author>
<published>2020-11-16T06:08:47Z</published>
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<id>urn:sha1:65789daa8087e125927230ccb7e1eab13999b0cf</id>
<content type='text'>
Nowadays, there are increasing requirements to benchmark the performance
of dma_map and dma_unmap particually while the device is attached to an
IOMMU.

This patch enables the support. Users can run specified number of threads
to do dma_map_page and dma_unmap_page on a specific NUMA node with the
specified duration. Then dma_map_benchmark will calculate the average
latency for map and unmap.

A difficulity for this benchmark is that dma_map/unmap APIs must run on
a particular device. Each device might have different backend of IOMMU or
non-IOMMU.

So we use the driver_override to bind dma_map_benchmark to a particual
device by:
For platform devices:
echo dma_map_benchmark &gt; /sys/bus/platform/devices/xxx/driver_override
echo xxx &gt; /sys/bus/platform/drivers/xxx/unbind
echo xxx &gt; /sys/bus/platform/drivers/dma_map_benchmark/bind

For PCI devices:
echo dma_map_benchmark &gt; /sys/bus/pci/devices/0000:00:01.0/driver_override
echo 0000:00:01.0 &gt; /sys/bus/pci/drivers/xxx/unbind
echo 0000:00:01.0 &gt; /sys/bus/pci/drivers/dma_map_benchmark/bind

Cc: Will Deacon &lt;will@kernel.org&gt;
Cc: Shuah Khan &lt;shuah@kernel.org&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Cc: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Cc: Robin Murphy &lt;robin.murphy@arm.com&gt;
Signed-off-by: Barry Song &lt;song.bao.hua@hisilicon.com&gt;
[hch: folded in two fixes from Colin Ian King &lt;colin.king@canonical.com&gt;]
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
</content>
</entry>
<entry>
<title>dma-mapping: Allow mixing bypass and mapped DMA operation</title>
<updated>2020-11-27T09:33:40Z</updated>
<author>
<name>Alexey Kardashevskiy</name>
<email>aik@ozlabs.ru</email>
</author>
<published>2020-10-29T01:52:40Z</published>
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<id>urn:sha1:8d8d53cf8fd028310b1189165b939cde124895d7</id>
<content type='text'>
At the moment we allow bypassing DMA ops only when we can do this for
the entire RAM. However there are configs with mixed type memory
where we could still allow bypassing IOMMU in most cases;
POWERPC with persistent memory is one example.

This adds an arch hook to determine where bypass can still work and
we invoke direct DMA API. The following patch checks the bus limit
on POWERPC to allow or disallow direct mapping.

This adds a ARCH_HAS_DMA_MAP_DIRECT config option to make the arch_xxxx
hooks no-op by default.

Signed-off-by: Alexey Kardashevskiy &lt;aik@ozlabs.ru&gt;
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
</content>
</entry>
<entry>
<title>dma-mapping: remove dma_virt_ops</title>
<updated>2020-11-17T19:22:07Z</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2020-11-06T18:19:41Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=172292be01dbd6c26aba23f62e8ec090f31cdb71'/>
<id>urn:sha1:172292be01dbd6c26aba23f62e8ec090f31cdb71</id>
<content type='text'>
Now that the RDMA core deals with devices that only do DMA mapping in
lower layers properly, there is no user for dma_virt_ops and it can be
removed.

Link: https://lore.kernel.org/r/20201106181941.1878556-11-hch@lst.de
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
</content>
</entry>
</feed>
