linux-dev/sound/soc/codecs/rt9120.c, branch linus/master

ASoC: rt9120: Use pm_runtime and regcache to optimize 'pwdnn' logic

2022-05-19T15:47:12Z

From the datasheet, the only way to meet the lowest power consumption is to pull low the 'pwdnn' gpio. But if it is low, IC will keep in reset state, all registers reset to default. And the power consumption is listed below 1. amp off and 'pwdnn' high => idle state, PVDD = 1mA, DVDD = 7mA 2. amp off and 'pwdnn' low => shutdown state, PVDD < 20uA, DVDD < 15uA It's the large difference for the consumption current This fix is to use pm_runtime and regcache to handle 'pwdnn' gpio control. Signed-off-by: ChiYuan Huang Link: https://lore.kernel.org/r/1652926418-8519-3-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown

ASoC: rt9120: Fix 3byte read, valule offset typo

2022-05-19T15:47:11Z

For RG 3byte read, the value order is offset [0], [1], and [2]. Signed-off-by: ChiYuan Huang Link: https://lore.kernel.org/r/1652926418-8519-2-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown

ASoC: rt9120: Add endianness flag in snd_soc_component_driver

2022-05-09T11:46:37Z

The endianness flag is used on the CODEC side to specify an ambivalence to endian, typically because it is lost over the hardware link. This device receives audio over an I2S DAI and as such should have endianness applied. Signed-off-by: Charles Keepax Link: https://lore.kernel.org/r/20220504170905.332415-24-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown

ASoC: rt9120: Correct the reg 0x09 size to one byte

2022-04-22T11:37:20Z

Correct the reg 0x09 size to one byte. Signed-off-by: ChiYuan Huang Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/1650608810-3829-1-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown

ASoC: rt9120: Add the compatibility with rt9120s

2021-11-12T18:16:39Z

Use device id reg to be compatible with rt9120 and rt9120s. Signed-off-by: ChiYuan Huang Link: https://lore.kernel.org/r/1636515921-31694-4-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown

ASoC: rt9120: Fix clock auto sync issue when fs is the multiple of 48

2021-11-12T18:16:37Z

If fs is divided by 48, to make audio clock sync rate correct, internal sync function have be disabled. Signed-off-by: ChiYuan Huang Link: https://lore.kernel.org/r/1636515921-31694-3-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown

ASoC: rt9120: Update internal ocp level to the correct value

2021-11-12T18:16:35Z

Update internal ocp level to correct value. Even the wrong ocp setting can also make the sound output, but the power cannot match the IC capability. Signed-off-by: ChiYuan Huang Link: https://lore.kernel.org/r/1636515921-31694-2-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown

ASoC: rt9120: Add rt9210 audio amplifier support

2021-10-13T11:59:41Z

Add Richtek rt9120 audio amplifier support. Signed-off-by: ChiYuan Huang Link: https://lore.kernel.org/r/1634088519-995-3-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown

ASoC: rt9120: Drop rt9210 audio amplifier support

2021-10-13T11:58:31Z

This drops the rt9210 support due to a race with a new version being sent out for some incremental changes. Signed-off-by: Mark Brown

ASoC: rt9120: Add rt9210 audio amplifier support

2021-10-08T12:50:37Z

Add Richtek rt9120 audio amplifier support. Signed-off-by: ChiYuan Huang [Fix a Gain->Volume -- broonie] Message-Id: <1633668612-25524-3-git-send-email-u0084500@gmail.com> Signed-off-by: Mark Brown