linux-dev/sound/soc/sof/mediatek/mt8186, branch linus/master

ASoC: SOF: mediatek: Add mt8186 ipc support

2022-05-16T11:58:13Z

mt8186 DSP uses two hardware mailbox IP to communicate with AP. One mailbox is used for requests coming from AP, and the other one is for requests from DSP. Signed-off-by: Allen-KH Cheng Signed-off-by: Tinghan Shen Link: https://lore.kernel.org/r/20220512082215.3018-4-tinghan.shen@mediatek.com Signed-off-by: Mark Brown

ASoC: SOF: mediatek: Fix allyesconfig build error

2022-04-27T13:15:35Z

ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o:(.opd+0x18): multiple definition of `adsp_clock_on'; sound/soc/sof/mediatek/mt8195/mt8195-clk.o:(.opd+0x60): first defined here ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o: in function `.adsp_clock_on': ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o:(.opd+0x30): multiple definition of `adsp_clock_off'; sound/soc/sof/mediatek/mt8195/mt8195-clk.o:(.opd+0x78): first defined here ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o: in function `.adsp_clock_off': ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o:(.opd+0x0): multiple definition of `sof_hifixdsp_boot_sequence'; sound/soc/sof/mediatek/mt8195/mt8195-loader.o:(.opd+0x0): first defined here ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o: in function `.sof_hifixdsp_boot_sequence': ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o:(.opd+0x18): multiple definition of `sof_hifixdsp_shutdown'; sound/soc/sof/mediatek/mt8195/mt8195-loader.o:(.opd+0x18): first defined here ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o: in function `.sof_hifixdsp_shutdown': Fixes: 570c14dc92d5 ("ASoC: SOF: mediatek: Add mt8186 sof fw loader and dsp ops") Fixes: 210b3ab932f7 ("ASoC: SOF: mediatek: Add mt8186 dsp clock support") Signed-off-by: Tinghan Shen Link: https://lore.kernel.org/r/20220427071030.10172-1-tinghan.shen@mediatek.com Signed-off-by: Mark Brown

ASoC: SOF: mediatek: Add DSP system PM callback for mt8186

2022-04-25T13:04:46Z

Add DSP system PM callback for suspend and resume Signed-off-by: Allen-KH Cheng Signed-off-by: Tinghan Shen Reviewed-by: Ranjani Sridharan Reviewed-by: Yaochun Hung Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20220422055659.8738-5-tinghan.shen@mediatek.com Signed-off-by: Mark Brown

ASoC: SOF: mediatek: Add mt8186 dsp clock support

2022-04-25T13:04:45Z

Add adsp clock on/off support on mt8186 SoC. Signed-off-by: Allen-KH Cheng Signed-off-by: Tinghan Shen Reviewed-by: Ranjani Sridharan Reviewed-by: Yaochun Hung Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20220422055659.8738-4-tinghan.shen@mediatek.com Signed-off-by: Mark Brown

ASoC: SOF: mediatek: Add mt8186 sof fw loader and dsp ops

2022-04-25T13:04:44Z

Add mt8186-loader module with ops callback to load and run firmware on mt8186 SoC. Signed-off-by: Allen-KH Cheng Signed-off-by: Tinghan Shen Reviewed-by: Ranjani Sridharan Reviewed-by: Yaochun Hung Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20220422055659.8738-3-tinghan.shen@mediatek.com Signed-off-by: Mark Brown

ASoC: SOF: mediatek: Add mt8186 hardware support

2022-04-25T13:04:43Z

Add support of SOF on Mediatek mt8186 SoC. MT8186 has 2 Cortex A76 cores paired with 6 Cortex A55 cores. It also has Cadence HiFi-5 DSP single core. The IPC communication between AP and DSP is based on shared DRAM and mailbox interrupt. Signed-off-by: Allen-KH Cheng Signed-off-by: Tinghan Shen Reviewed-by: Ranjani Sridharan Reviewed-by: Yaochun Hung Reviewed-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20220422055659.8738-2-tinghan.shen@mediatek.com Signed-off-by: Mark Brown