linux-dev/tools/testing/selftests/powerpc/security, branch linus/master

selftests/powerpc/pmu: fix spelling mistake "mis-match" -> "mismatch"

2022-05-22T05:59:54Z

There are a few spelling mistakes in error messages. Fix them. Signed-off-by: Colin Ian King Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220319232025.22067-1-colin.i.king@gmail.com

selftests/powerpc: Better reporting in spectre_v2

2022-05-22T05:58:28Z

In commit f3054ffd71b5 ("selftests/powerpc: Return skip code for spectre_v2"), the spectre_v2 selftest is updated to be aware of cases where the vulnerability status reported in sysfs is incorrect, skipping the test instead. This happens because qemu can misrepresent the mitigation status of the host to the guest. If the count cache is disabled in the host, and this is correctly reported to the guest, then the guest won't apply mitigations. If the guest is then migrated to a new host where mitigations are necessary, it is now vulnerable because it has not applied mitigations. Update the selftest to report when we see excessive misses, indicative of the count cache being disabled. If software flushing is enabled, also warn that these flushes are just wasting performance. Signed-off-by: Russell Currey [mpe: Rebase and update change log appropriately] Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20210608064809.199116-1-ruscur@russell.cc

selftests/powerpc: Fix typo in spectre_v2

2022-05-04T09:37:46Z

Signed-off-by: Russell Currey Signed-off-by: Christophe Leroy Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20210608054851.164659-1-ruscur@russell.cc

selftests/powerpc/pmu: Add macros to parse event codes

2022-03-01T12:38:12Z

Each platform has raw event encoding format which specifies the bit positions for different fields. The fields from event code gets translated into performance monitoring mode control register (MMCRx) settings. Patch add macros to extract individual fields from the event code. Add functions for sanity checks, since testcases currently are only supported in power9 and power10. Signed-off-by: Madhavan Srinivasan [mpe: Read PVR directly rather than using /proc/cpuinfo] Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20220127072012.662451-4-kjain@linux.ibm.com

selftests/powerpc: skip tests for unavailable mitigations.

2021-12-16T10:31:46Z

Mitigation patching test iterates over a set of mitigations irrespective of whether a certain mitigation is supported/available in the kernel. This causes following messages on a kernel where some mitigations are unavailable: Spawned threads enabling/disabling mitigations ... cat: entry_flush: No such file or directory cat: uaccess_flush: No such file or directory Waiting for timeout ... OK This patch adds a check for available mitigations in the kernel. Reported-by: Nageswara R Sastry Signed-off-by: Sachin Sant Tested-by: Nageswara R Sastry Reviewed-by: Russell Currey Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/163941374362.36967.18016981579099073379.sendpatchset@1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.ip6.arpa

selftests/powerpc/spectre_v2: Return skip code when miss_percent is high

2021-12-09T11:41:21Z

A mis-match between reported and actual mitigation is not restricted to the Vulnerable case. The guest might also report the mitigation as "Software count cache flush" and the host will still mitigate with branch cache disabled. So, instead of skipping depending on the detected mitigation, simply skip whenever the detected miss_percent is the expected one for a fully mitigated system, that is, above 95%. Signed-off-by: Thadeu Lima de Souza Cascardo Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20211207130557.40566-1-cascardo@canonical.com

selftests/powerpc: Use date instead of EPOCHSECONDS in mitigation-patching.sh

2021-10-27T11:34:02Z

The EPOCHSECONDS environment variable was added in bash 5.0 (released 2019). Some distributions of the "stable" and "long-term" variety ship older versions of bash than this, so swap to using the date command instead. "%s" was added to coreutils `date` in 1993 so we should be good, but who knows, it is a GNU extension and not part of the POSIX spec for `date`. Signed-off-by: Russell Currey Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20211025102436.19177-1-ruscur@russell.cc

selftests/powerpc: Add test of mitigation patching

2021-05-17T05:27:47Z

We recently discovered some of our mitigation patching was not safe against other CPUs running concurrently. Add a test which enable/disables all mitigations in a tight loop while also running some stress load. On an unpatched system this almost always leads to an oops and panic/reboot, but we also check if the kernel becomes tainted in case we have a non-fatal oops. Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20210507064225.1556312-1-mpe@ellerman.id.au

selftests/powerpc: Add uaccess flush test

2021-04-22T15:38:03Z

Also based on the RFI and entry flush tests, it counts the L1D misses by doing a syscall that does user access: uname, in this case. Signed-off-by: Thadeu Lima de Souza Cascardo [dja: forward port, rename function] Signed-off-by: Daniel Axtens Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20210225061949.1213404-1-dja@axtens.net

selftests/powerpc: Fix L1D flushing tests for Power10

2021-03-24T03:09:29Z

The rfi_flush and entry_flush selftests work by using the PM_LD_MISS_L1 perf event to count L1D misses. The value of this event has changed over time: - Power7 uses 0x400f0 - Power8 and Power9 use both 0x400f0 and 0x3e054 - Power10 uses only 0x3e054 Rather than relying on raw values, configure perf to count L1D read misses in the most explicit way available. This fixes the selftests to work on systems without 0x400f0 as PM_LD_MISS_L1, and should change no behaviour for systems that the tests already worked on. The only potential downside is that referring to a specific perf event requires PMU support implemented in the kernel for that platform. Signed-off-by: Russell Currey Acked-by: Daniel Axtens Signed-off-by: Michael Ellerman Link: https://lore.kernel.org/r/20210223070227.2916871-1-ruscur@russell.cc