<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-dev/tools/testing/selftests/powerpc/utils.c, branch linus/master</title>
<subtitle>Linux kernel development work - see feature branches</subtitle>
<id>https://git.zx2c4.com/linux-dev/atom/tools/testing/selftests/powerpc/utils.c?h=linus%2Fmaster</id>
<link rel='self' href='https://git.zx2c4.com/linux-dev/atom/tools/testing/selftests/powerpc/utils.c?h=linus%2Fmaster'/>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/'/>
<updated>2020-09-08T12:23:57Z</updated>
<entry>
<title>selftests/powerpc: Move set_dscr() into rfi_flush.c</title>
<updated>2020-09-08T12:23:57Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2020-08-19T01:57:21Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d89002397cfb2b65267d6688fe671ee1cf7c5f0d'/>
<id>urn:sha1:d89002397cfb2b65267d6688fe671ee1cf7c5f0d</id>
<content type='text'>
This version of set_dscr() was added for the RFI flush test, and is
fairly specific to it. It also clashes with the version of set_dscr()
in dscr/dscr.h. So move it into the RFI flush test where it's used.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200819015727.1977134-3-mpe@ellerman.id.au
</content>
</entry>
<entry>
<title>selftests/powerpc: Make using_hash_mmu() work on Cell &amp; PowerMac</title>
<updated>2020-09-08T12:23:51Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2020-08-19T01:57:19Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=34c103342be3f9397e656da7c5cc86e97b91f514'/>
<id>urn:sha1:34c103342be3f9397e656da7c5cc86e97b91f514</id>
<content type='text'>
These platforms don't show the MMU in /proc/cpuinfo, but they always
use hash, so teach using_hash_mmu() that.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200819015727.1977134-1-mpe@ellerman.id.au
</content>
</entry>
<entry>
<title>selftests/powerpc: Fix online CPU selection</title>
<updated>2020-07-30T12:53:50Z</updated>
<author>
<name>Sandipan Das</name>
<email>sandipan@linux.ibm.com</email>
</author>
<published>2020-07-30T05:08:46Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=dfa03fff86027e58c8dba5c03ae68150d4e513ad'/>
<id>urn:sha1:dfa03fff86027e58c8dba5c03ae68150d4e513ad</id>
<content type='text'>
The size of the CPU affinity mask must be large enough for
systems with a very large number of CPUs. Otherwise, tests
which try to determine the first online CPU by calling
sched_getaffinity() will fail. This makes sure that the size
of the allocated affinity mask is dependent on the number of
CPUs as reported by get_nprocs_conf().

Fixes: 3752e453f6ba ("selftests/powerpc: Add tests of PMU EBBs")
Reported-by: Shirisha Ganta &lt;shiganta@in.ibm.com&gt;
Signed-off-by: Sandipan Das &lt;sandipan@linux.ibm.com&gt;
Reviewed-by: Kamalesh Babulal &lt;kamalesh@linux.vnet.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/a408c4b8e9a23bb39b539417a21eb0ff47bb5127.1596084858.git.sandipan@linux.ibm.com
</content>
</entry>
<entry>
<title>selftests/powerpc: Move Hash MMU check to utilities</title>
<updated>2020-06-30T04:37:51Z</updated>
<author>
<name>Sandipan Das</name>
<email>sandipan@linux.ibm.com</email>
</author>
<published>2020-06-04T12:56:09Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c405b738daf9d8e8a5aedfeb6be851681e65e54b'/>
<id>urn:sha1:c405b738daf9d8e8a5aedfeb6be851681e65e54b</id>
<content type='text'>
This moves a function to test if the MMU is in Hash mode
under the generic test utilities.

Signed-off-by: Sandipan Das &lt;sandipan@linux.ibm.com&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20200604125610.649668-3-sandipan@linux.ibm.com
</content>
</entry>
<entry>
<title>selftests/powerpc: Add a test of spectre_v2 mitigations</title>
<updated>2019-10-30T04:43:57Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2019-05-20T10:55:20Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=c790c3d2b0ec5979d83451d0688d1cd07e23d8ba'/>
<id>urn:sha1:c790c3d2b0ec5979d83451d0688d1cd07e23d8ba</id>
<content type='text'>
This test uses the PMU to count branch prediction hits/misses for a
known loop, and compare the result to the reported spectre v2
mitigation.

This gives us a way of sanity checking that the reported mitigation is
actually in effect.

Sample output for some cases, eg:

  Power9:
    sysfs reports: 'Vulnerable'
     PM_BR_PRED_CCACHE: result        368 running/enabled 5792777124
    PM_BR_MPRED_CCACHE: result        319 running/enabled 5792775546
     PM_BR_PRED_PCACHE: result 2147483281 running/enabled 5792773128
    PM_BR_MPRED_PCACHE: result  213604201 running/enabled 5792771640
    Miss percent 9 %
    OK - Measured branch prediction rates match reported spectre v2 mitigation.

    sysfs reports: 'Mitigation: Indirect branch serialisation (kernel only)'
     PM_BR_PRED_CCACHE: result        895 running/enabled 5780320920
    PM_BR_MPRED_CCACHE: result        822 running/enabled 5780312414
     PM_BR_PRED_PCACHE: result 2147482754 running/enabled 5780308836
    PM_BR_MPRED_PCACHE: result  213639731 running/enabled 5780307912
    Miss percent 9 %
    OK - Measured branch prediction rates match reported spectre v2 mitigation.

    sysfs reports: 'Mitigation: Indirect branch cache disabled'
     PM_BR_PRED_CCACHE: result 2147483649 running/enabled 20540186160
    PM_BR_MPRED_CCACHE: result 2147483649 running/enabled 20540180056
     PM_BR_PRED_PCACHE: result          0 running/enabled 20540176090
    PM_BR_MPRED_PCACHE: result          0 running/enabled 20540174182
    Miss percent 100 %
    OK - Measured branch prediction rates match reported spectre v2 mitigation.

  Power8:
    sysfs reports: 'Vulnerable'
     PM_BR_PRED_CCACHE: result 2147483649 running/enabled 3505888142
    PM_BR_MPRED_CCACHE: result          9 running/enabled 3505882788
    Miss percent 0 %
    OK - Measured branch prediction rates match reported spectre v2 mitigation.

    sysfs reports: 'Mitigation: Indirect branch cache disabled'
     PM_BR_PRED_CCACHE: result 2147483649 running/enabled 16931421988
    PM_BR_MPRED_CCACHE: result 2147483649 running/enabled 16931416478
    Miss percent 100 %
    OK - Measured branch prediction rates match reported spectre v2 mitigation.
    success: spectre_v2

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Link: https://lore.kernel.org/r/20190520105520.22274-1-mpe@ellerman.id.au
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 191</title>
<updated>2019-05-30T18:29:21Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-28T16:57:18Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=f50a7f3d9225dd374455f28138f79ae3074a7a3d'/>
<id>urn:sha1:f50a7f3d9225dd374455f28138f79ae3074a7a3d</id>
<content type='text'>
Based on 1 normalized pattern(s):

  licensed under gplv2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 99 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Reviewed-by: Richard Fontana &lt;rfontana@redhat.com&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Steve Winslow &lt;swinslow@gmail.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528170027.163048684@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>selftests/powerpc: Fix compilation issue due to asm label</title>
<updated>2018-10-31T23:06:03Z</updated>
<author>
<name>Naveen N. Rao</name>
<email>naveen.n.rao@linux.vnet.ibm.com</email>
</author>
<published>2018-10-31T17:18:13Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=1936f094e164cc13ebf17aba1d6b34e033e64188'/>
<id>urn:sha1:1936f094e164cc13ebf17aba1d6b34e033e64188</id>
<content type='text'>
We are using 'dscr_insn' as a label in inline asm to identify if a
SIGILL was generated by the mtspr instruction at that point. However,
with inline assembly, the compiler is still free to duplicate the asm
statement for optimization purposes, which results in the label being
defined twice with the error:
	/tmp/ccerQCql.s:874: Error: symbol `dscr_insn' is already defined

With different compiler versions, we may also see:
	/tmp/ccJzLDlN.o:(.toc+0x0): undefined reference to `dscr_insn'

Remove the use of the label in the inline assembly. Instead, just look
for the offending instruction in the signal handler.

Fixes: d2bf793237b3 ("selftests/powerpc: Add test to verify rfi flush across a system call")
Reported-by: Breno Leitao &lt;leitao@debian.org&gt;
Signed-off-by: Naveen N. Rao &lt;naveen.n.rao@linux.vnet.ibm.com&gt;
Tested-by: Breno Leitao &lt;leitao@debian.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>selftests/powerpc: Add test to verify rfi flush across a system call</title>
<updated>2018-10-20T02:26:47Z</updated>
<author>
<name>Naveen N. Rao</name>
<email>naveen.n.rao@linux.vnet.ibm.com</email>
</author>
<published>2018-05-21T15:13:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=d2bf793237b3aa9c4275a466eef3893eef593691'/>
<id>urn:sha1:d2bf793237b3aa9c4275a466eef3893eef593691</id>
<content type='text'>
This adds a test to verify proper functioning of the rfi flush
capability implemented to mitigate meltdown. The test works by
measuring the number of L1d cache misses encountered while loading
data from memory. Across a system call, since the L1d cache is flushed
when rfi_flush is enabled, the number of cache misses is expected to
be relative to the number of cachelines corresponding to the data
being loaded.

The current system setting is reflected via powerpc/rfi_flush under
debugfs (assumed to be /sys/kernel/debug/). This test verifies the
expected result with rfi_flush enabled as well as when it is disabled.

Signed-off-by: Anton Blanchard &lt;anton@samba.org&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Naveen N. Rao &lt;naveen.n.rao@linux.vnet.ibm.com&gt;
[mpe: Add SPDX tags, clang format, skip if the debugfs is missing, use
 __u64 and SANE_USERSPACE_TYPES to avoid printf() build errors.]
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>selftests/powerpc: Add a helper for checking if we're on ppc64le</title>
<updated>2018-08-07T11:49:25Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2018-07-26T12:24:57Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=95f9b3af401f5b4daeb908a2c658e820e969f4e3'/>
<id>urn:sha1:95f9b3af401f5b4daeb908a2c658e820e969f4e3</id>
<content type='text'>
Some of our selftests have only been tested on ppc64le and crash or
behave weirdly on ppc64/ppc32. So add a helper for checking the UTS
machine.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
<entry>
<title>selftests/powerpc: Refactor the AUXV routines</title>
<updated>2017-03-20T08:02:49Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2017-02-06T10:13:27Z</published>
<link rel='alternate' type='text/html' href='https://git.zx2c4.com/linux-dev/commit/?id=e3028437cb45c04a9caae4d6372bfe08e70293cd'/>
<id>urn:sha1:e3028437cb45c04a9caae4d6372bfe08e70293cd</id>
<content type='text'>
Refactor the AUXV routines so they are more composable. In a future test
we want to look for many AUXV entries and we don't want to have to read
/proc/self/auxv each time.

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
</content>
</entry>
</feed>
