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authorChristoffer Dall <cdall@linaro.org>2017-05-02 20:11:49 +0200
committerChristoffer Dall <cdall@linaro.org>2017-06-08 16:59:56 +0200
commit3cba4af31c61fc9420fdcf083f509a6c20a6d8e5 (patch)
treeb8f6ed98f76eafb683fc7880d2bd03ec55371a15
parentKVM: arm: Handle VCPU device attributes in guest.c (diff)
downloadlinux-dev-3cba4af31c61fc9420fdcf083f509a6c20a6d8e5.tar.xz
linux-dev-3cba4af31c61fc9420fdcf083f509a6c20a6d8e5.zip
KVM: arm/arm64: Move irq_is_ppi() to header file
We are about to need this define in the arch timer code as well so move it to a common location. Signed-off-by: Christoffer Dall <cdall@linaro.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to '')
-rw-r--r--include/kvm/arm_vgic.h2
-rw-r--r--virt/kvm/arm/pmu.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
index 97b8d3728b31..dde59fbc5f80 100644
--- a/include/kvm/arm_vgic.h
+++ b/include/kvm/arm_vgic.h
@@ -38,6 +38,8 @@
#define VGIC_MIN_LPI 8192
#define KVM_IRQCHIP_NUM_PINS (1020 - 32)
+#define irq_is_ppi(irq) ((irq) >= VGIC_NR_SGIS && (irq) < VGIC_NR_PRIVATE_IRQS)
+
enum vgic_type {
VGIC_V2, /* Good ol' GICv2 */
VGIC_V3, /* New fancy GICv3 */
diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c
index 96a9cab39982..574feff55a6c 100644
--- a/virt/kvm/arm/pmu.c
+++ b/virt/kvm/arm/pmu.c
@@ -496,8 +496,6 @@ static int kvm_arm_pmu_v3_init(struct kvm_vcpu *vcpu)
return 0;
}
-#define irq_is_ppi(irq) ((irq) >= VGIC_NR_SGIS && (irq) < VGIC_NR_PRIVATE_IRQS)
-
/*
* For one VM the interrupt type must be same for each vcpu.
* As a PPI, the interrupt number is the same for all vcpus,