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authorChristophe Roullier <christophe.roullier@st.com>2019-03-05 09:29:25 +0100
committerDavid S. Miller <davem@davemloft.net>2019-03-08 11:48:19 -0800
commit830133daec63d450e702e6196cec9f0413164164 (patch)
tree9a5fb3237927bebfb15c9570e67d21269844c0f8
parentnet: ethernet: stmmac: update to support all PHY config for stm32mp157c. (diff)
downloadlinux-dev-830133daec63d450e702e6196cec9f0413164164.tar.xz
linux-dev-830133daec63d450e702e6196cec9f0413164164.zip
dt-bindings: net: stmmac: add phys config properties
Add properties to support all Phy config PHY_MODE (MII,GMII, RMII, RGMII) and in normal, PHY wo crystal (25Mhz), PHY wo crystal (50Mhz), No 125Mhz from PHY config. Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
-rw-r--r--Documentation/devicetree/bindings/net/stm32-dwmac.txt6
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.txt b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
index 1341012722aa..3524e80c5e96 100644
--- a/Documentation/devicetree/bindings/net/stm32-dwmac.txt
+++ b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
@@ -24,9 +24,9 @@ Required properties:
encompases the glue register, and the offset of the control register.
Optional properties:
-- clock-names: For MPU family "mac-clk-ck" for PHY without quartz
-- st,int-phyclk (boolean) : valid only where PHY do not have quartz and need to be clock
- by RCC
+- clock-names: For MPU family "eth-ck" for PHY without quartz
+- st,eth-clk-sel (boolean) : set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125.
+- st,eth-ref-clk-sel (boolean) : set this property in RMII mode when you have PHY without crystal 50MHz and want to select RCC clock instead of ETH_REF_CLK.
Example: