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| author |   Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2015-07-30 01:02:36 +0200 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2015-08-07 11:56:25 +0200 |
| commit | fe2edd9cbb7763c68350e267f8060113ce9848fe (patch) | |
| tree | e86ee2dd0235a47e1bf93f43553dfa495b824854 /Documentation/devicetree/bindings/arm/atmel-at91.txt | |
| parent | ARM: at91/dt: add minimal sama5d2 Xplained board (diff) | |
| download | linux-dev-fe2edd9cbb7763c68350e267f8060113ce9848fe.tar.xz linux-dev-fe2edd9cbb7763c68350e267f8060113ce9848fe.zip | |
Documentation: dt: atmel-at91: add clocks to system timer, rstc and shdwc
The system timer (at91rm9200), the reset controller and the shutdown
controller need an input clock. This is the slow clock and they will not
function without it.
Also fix the shutdown controller example.
Acked-By: Sebastian Reichel <sre@kernel.org>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to '')
| -rw-r--r-- | Documentation/devicetree/bindings/arm/atmel-at91.txt | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt index 424ac8cbfa08..209710cdf3aa 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.txt +++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt @@ -50,6 +50,7 @@ System Timer (ST) required properties: - reg: Should contain registers location and length - interrupts: Should contain interrupt for the ST which is the IRQ line shared across all System Controller members. +- clocks: phandle to input clock. Its subnodes can be: - watchdog: compatible should be "atmel,at91rm9200-wdt" @@ -89,12 +90,14 @@ RSTC Reset Controller required properties: - compatible: Should be "atmel,<chip>-rstc". <chip> can be "at91sam9260" or "at91sam9g45" - reg: Should contain registers location and length +- clocks: phandle to input clock. Example: rstc@fffffd00 { compatible = "atmel,at91sam9260-rstc"; reg = <0xfffffd00 0x10>; + clocks = <&clk32k>; }; RAMC SDRAM/DDR Controller required properties: @@ -117,6 +120,7 @@ required properties: - compatible: Should be "atmel,<chip>-shdwc". <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5". - reg: Should contain registers location and length +- clocks: phandle to input clock. optional properties: - atmel,wakeup-mode: String, operation mode of the wakeup mode. @@ -135,9 +139,10 @@ optional at91sam9x5 properties: Example: - rstc@fffffd00 { - compatible = "atmel,at91sam9260-rstc"; - reg = <0xfffffd00 0x10>; + shdwc@fffffd10 { + compatible = "atmel,at91sam9260-shdwc"; + reg = <0xfffffd10 0x10>; + clocks = <&clk32k>; }; Special Function Registers (SFR) |