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author | Arnaud Pouliquen <arnaud.pouliquen@st.com> | 2019-12-17 09:24:15 +0100 |
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committer | Rob Herring <robh@kernel.org> | 2019-12-17 17:50:59 -0600 |
commit | 34566e4f2d681570c271bf71f8405e0c78251127 (patch) | |
tree | 2a7fd7cee2698fb4a4fa9b8d4bf96a038c7a644c /Documentation/devicetree/bindings/arm/stm32/mlahb.txt | |
parent | dt-bindings: rtc: Convert stm32 rtc bindings to json-schema (diff) | |
download | linux-dev-34566e4f2d681570c271bf71f8405e0c78251127.tar.xz linux-dev-34566e4f2d681570c271bf71f8405e0c78251127.zip |
dt-bindings: stm32: convert mlahb to json-schema
Convert the ML-AHB bus bindings to DT schema format using json-schema
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to '')
-rw-r--r-- | Documentation/devicetree/bindings/arm/stm32/mlahb.txt | 37 |
1 files changed, 0 insertions, 37 deletions
diff --git a/Documentation/devicetree/bindings/arm/stm32/mlahb.txt b/Documentation/devicetree/bindings/arm/stm32/mlahb.txt deleted file mode 100644 index 25307aa1eb9b..000000000000 --- a/Documentation/devicetree/bindings/arm/stm32/mlahb.txt +++ /dev/null @@ -1,37 +0,0 @@ -ML-AHB interconnect bindings - -These bindings describe the STM32 SoCs ML-AHB interconnect bus which connects -a Cortex-M subsystem with dedicated memories. -The MCU SRAM and RETRAM memory parts can be accessed through different addresses -(see "RAM aliases" in [1]) using different buses (see [2]) : balancing the -Cortex-M firmware accesses among those ports allows to tune the system -performance. - -[1]: https://www.st.com/resource/en/reference_manual/dm00327659.pdf -[2]: https://wiki.st.com/stm32mpu/wiki/STM32MP15_RAM_mapping - -Required properties: -- compatible: should be "simple-bus" -- dma-ranges: describes memory addresses translation between the local CPU and - the remote Cortex-M processor. Each memory region, is declared with - 3 parameters: - - param 1: device base address (Cortex-M processor address) - - param 2: physical base address (local CPU address) - - param 3: size of the memory region. - -The Cortex-M remote processor accessed via the mlahb interconnect is described -by a child node. - -Example: -mlahb { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - dma-ranges = <0x00000000 0x38000000 0x10000>, - <0x10000000 0x10000000 0x60000>, - <0x30000000 0x30000000 0x60000>; - - m4_rproc: m4@10000000 { - ... - }; -}; |