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author | Maxime Ripard <maxime@cerno.tech> | 2019-12-13 08:45:33 +0100 |
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committer | Rob Herring <robh@kernel.org> | 2019-12-17 20:12:20 -0600 |
commit | 2609a1271d50847e7d5499d000097fc9b8802ffa (patch) | |
tree | 823b9fd04d3dc907a000513023aa37344ba29ab3 /Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt | |
parent | dt-bindings: media: Convert Allwinner A31 CSI to a schema (diff) | |
download | linux-dev-2609a1271d50847e7d5499d000097fc9b8802ffa.tar.xz linux-dev-2609a1271d50847e7d5499d000097fc9b8802ffa.zip |
dt-bindings: interconnect: Convert Allwinner MBUS controller to a schema
The older Allwinner SoCs have an MBUS controller that is used by Linux,
with a matching Device Tree binding.
Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to '')
-rw-r--r-- | Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt | 37 |
1 files changed, 0 insertions, 37 deletions
diff --git a/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt b/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt deleted file mode 100644 index 2005bb486705..000000000000 --- a/Documentation/devicetree/bindings/arm/sunxi/sunxi-mbus.txt +++ /dev/null @@ -1,37 +0,0 @@ -Allwinner Memory Bus (MBUS) controller - -The MBUS controller drives the MBUS that other devices in the SoC will -use to perform DMA. It also has a register interface that allows to -monitor and control the bandwidth and priorities for masters on that -bus. - -Required properties: - - compatible: Must be one of: - - allwinner,sun5i-a13-mbus - - allwinner,sun8i-h3-mbus - - reg: Offset and length of the register set for the controller - - clocks: phandle to the clock driving the controller - - dma-ranges: See section 2.3.9 of the DeviceTree Specification - - #interconnect-cells: Must be one, with the argument being the MBUS - port ID - -Each device having to perform their DMA through the MBUS must have the -interconnects and interconnect-names properties set to the MBUS -controller and with "dma-mem" as the interconnect name. - -Example: - -mbus: dram-controller@1c01000 { - compatible = "allwinner,sun5i-a13-mbus"; - reg = <0x01c01000 0x1000>; - clocks = <&ccu CLK_MBUS>; - dma-ranges = <0x00000000 0x40000000 0x20000000>; - #interconnect-cells = <1>; -}; - -fe0: display-frontend@1e00000 { - compatible = "allwinner,sun5i-a13-display-frontend"; - ... - interconnects = <&mbus 19>; - interconnect-names = "dma-mem"; -}; |