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authorYuantian Tang <andy.tang@nxp.com>2017-06-07 14:32:47 +0800
committerShawn Guo <shawnguo@kernel.org>2017-06-14 22:42:08 +0800
commit5f6e9217dbae5e6979b0c16d5fd448dd865b2f78 (patch)
tree2a1146cc49b87257643d21befde56d0b75dcb9b7 /Documentation/devicetree/bindings/ata
parentarm64: dts: ls1012a: Add coreclk (diff)
downloadlinux-dev-5f6e9217dbae5e6979b0c16d5fd448dd865b2f78.tar.xz
linux-dev-5f6e9217dbae5e6979b0c16d5fd448dd865b2f78.zip
dt-bindings: ahci-fsl-qoriq: add ls1088a chip name to the list
Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/ata')
-rw-r--r--Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
index fc33ca01e9ba..7c3ca0e13de0 100644
--- a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
@@ -3,7 +3,7 @@ Binding for Freescale QorIQ AHCI SATA Controller
Required properties:
- reg: Physical base address and size of the controller's register area.
- compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where
- chip could be ls1021a, ls1043a, ls1046a, ls2080a etc.
+ chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc.
- clocks: Input clock specifier. Refer to common clock bindings.
- interrupts: Interrupt specifier. Refer to interrupt binding.