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| author |   Ezequiel Garcia <ezequiel@collabora.com> | 2018-10-04 20:12:21 -0400 |
|---|---|---|
| committer |   Mauro Carvalho Chehab <mchehab+samsung@kernel.org> | 2018-10-05 07:00:43 -0400 |
| commit | e4183d3256e3cd668e899d06af66da5aac3a51af (patch) | |
| tree | 84c11a8ec578f9295348e140eb636ac289c9b6af /Documentation/devicetree/bindings/media | |
| parent | media: platform: Add Cedrus VPU decoder driver (diff) | |
| download | linux-dev-e4183d3256e3cd668e899d06af66da5aac3a51af.tar.xz linux-dev-e4183d3256e3cd668e899d06af66da5aac3a51af.zip | |
media: dt-bindings: Document the Rockchip VPU bindings
Add devicetree binding documentation for Rockchip Video Processing
Unit IP.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/media')
| -rw-r--r-- | Documentation/devicetree/bindings/media/rockchip-vpu.txt | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/media/rockchip-vpu.txt b/Documentation/devicetree/bindings/media/rockchip-vpu.txt new file mode 100644 index 000000000000..35dc464ad7c8 --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip-vpu.txt @@ -0,0 +1,29 @@ +device-tree bindings for rockchip VPU codec + +Rockchip (Video Processing Unit) present in various Rockchip platforms, +such as RK3288 and RK3399. + +Required properties: +- compatible: value should be one of the following + "rockchip,rk3288-vpu"; + "rockchip,rk3399-vpu"; +- interrupts: encoding and decoding interrupt specifiers +- interrupt-names: should be "vepu" and "vdpu" +- clocks: phandle to VPU aclk, hclk clocks +- clock-names: should be "aclk" and "hclk" +- power-domains: phandle to power domain node +- iommus: phandle to a iommu node + +Example: +SoC-specific DT entry: + vpu: video-codec@ff9a0000 { + compatible = "rockchip,rk3288-vpu"; + reg = <0x0 0xff9a0000 0x0 0x800>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "vepu", "vdpu"; + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; + clock-names = "aclk", "hclk"; + power-domains = <&power RK3288_PD_VIDEO>; + iommus = <&vpu_mmu>; + }; |