|author||David S. Miller <email@example.com>||2017-06-20 13:23:06 -0400|
|committer||David S. Miller <firstname.lastname@example.org>||2017-06-20 13:23:06 -0400|
|parent||Merge branch 'net-Introduction-of-the-tc-tests' (diff)|
|parent||net-next: stmmac: dwmac-sun8i: add support for V3s EMAC (diff)|
Merge branch 'net-next-stmmac-dwmac-sun8i-add-support-for-V3s'
Icenowy Zheng says: ==================== net-next: stmmac: dwmac-sun8i: add support for V3s Allwinner V3s features an EMAC like the on in H3, but without external MII interfaces, so being not able really to use RMII/RGMII. And it has a different default value of syscon (0x38000 instead of 0x58000 on H3), which shows a problem that the EMAC clock freq should be 24MHz. (Both H3 and V3s SoCs doesn't have extra xtal input for EPHY, and the main xtal is 24MHz. The default value of H3 is set to 24MHz, but the V3s default value is set to 25MHz). First two patches are device tree binding patches, the third forces the frequency to 24MHz and the fourth really add the V3s support. ==================== Signed-off-by: David S. Miller <email@example.com>
Diffstat (limited to 'Documentation/devicetree/bindings/misc/allwinner,syscon.txt')
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/misc/allwinner,syscon.txt b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt
index cb5769137c6c..31494a24fe69 100644
@@ -9,6 +9,7 @@ Required properties for the system controller:
- reg: address and length of the register for the device.
- compatible: should be "syscon" and one of the following string: