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author | Evan Green <evgreen@chromium.org> | 2018-11-28 14:34:26 -0800 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2018-12-17 08:26:24 +0100 |
commit | 67b4ff9fb796d8e572a9bb82d851639a81812aa9 (patch) | |
tree | cc995e224032b573d97453946ff604ed9dc08c12 /Documentation/devicetree/bindings/mmc/sdhci-msm.txt | |
parent | mmc: sdhci-pci: Add max-frequency device property for Intel controllers (diff) | |
download | linux-dev-67b4ff9fb796d8e572a9bb82d851639a81812aa9.tar.xz linux-dev-67b4ff9fb796d8e572a9bb82d851639a81812aa9.zip |
dt-bindings: mmc: sdhci-msm: Clarify register requirements
In sdhci-msm-v5 and beyond, the MCI registers are removed, so there is only
one register region required.
Signed-off-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to '')
-rw-r--r-- | Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt index b72871ac90cb..da4edb146a98 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt @@ -25,7 +25,7 @@ Required properties: - reg: Base address and length of the register in the following order: - Host controller register map (required) - - SD Core register map (required) + - SD Core register map (required for msm-v4 and below) - interrupts: Should contain an interrupt-specifiers for the interrupts: - Host controller interrupt (required) - pinctrl-names: Should contain only one value - "default". |