aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/phy
diff options
context:
space:
mode:
authorColin Foster <colin.foster@in-advantage.com>2022-09-11 09:37:15 -0700
committerVinod Koul <vkoul@kernel.org>2022-09-13 22:10:15 +0530
commita525f380a3b98de5ba11417b35e3819142ca2b97 (patch)
tree8755c9600f0a90782eae94d3168229ee173a2716 /Documentation/devicetree/bindings/phy
parentphy: usb: sunplus: Fix return value check in update_disc_vol() (diff)
downloadlinux-dev-a525f380a3b98de5ba11417b35e3819142ca2b97.tar.xz
linux-dev-a525f380a3b98de5ba11417b35e3819142ca2b97.zip
dt-bindings: phy: ocelot-serdes: convert to YAML
Convert the phy-ocelot-serdes device tree binding to the new YAML format. Additionally, add the file to MAINTAINERS since the original file didn't exist. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220911163715.4036144-2-colin.foster@in-advantage.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/phy')
-rw-r--r--Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml56
-rw-r--r--Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt43
2 files changed, 56 insertions, 43 deletions
diff --git a/Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml b/Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml
new file mode 100644
index 000000000000..3169b873231e
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/mscc,vsc7514-serdes.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microsemi Ocelot SerDes muxing
+
+maintainers:
+ - Alexandre Belloni <alexandre.belloni@bootlin.com>
+ - UNGLinuxDriver@microchip.com
+
+description: |
+ On Microsemi Ocelot, there is a handful of registers in HSIO address
+ space for setting up the SerDes to switch port muxing.
+
+ A SerDes X can be "muxed" to work with switch port Y or Z for example.
+ One specific SerDes can also be used as a PCIe interface.
+
+ Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.
+
+ There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
+ half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
+ 10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.
+
+ Also, SERDES6G number (aka "macro") 0 is the only interface supporting
+ QSGMII.
+
+ This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
+ Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot.
+
+properties:
+ compatible:
+ enum:
+ - mscc,vsc7514-serdes
+
+ "#phy-cells":
+ const: 2
+ description: |
+ The first number defines the input port to use for a given SerDes macro.
+ The second defines the macro to use. They are defined in
+ dt-bindings/phy/phy-ocelot-serdes.h
+
+required:
+ - compatible
+ - "#phy-cells"
+
+additionalProperties:
+ false
+
+examples:
+ - |
+ serdes: serdes {
+ compatible = "mscc,vsc7514-serdes";
+ #phy-cells = <2>;
+ };
diff --git a/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
deleted file mode 100644
index 332219860187..000000000000
--- a/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt
+++ /dev/null
@@ -1,43 +0,0 @@
-Microsemi Ocelot SerDes muxing driver
--------------------------------------
-
-On Microsemi Ocelot, there is a handful of registers in HSIO address
-space for setting up the SerDes to switch port muxing.
-
-A SerDes X can be "muxed" to work with switch port Y or Z for example.
-One specific SerDes can also be used as a PCIe interface.
-
-Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.
-
-There are two kinds of SerDes: SERDES1G supports 10/100Mbps in
-half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports
-10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.
-
-Also, SERDES6G number (aka "macro") 0 is the only interface supporting
-QSGMII.
-
-This is a child of the HSIO syscon ("mscc,ocelot-hsio", see
-Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot.
-
-Required properties:
-
-- compatible: should be "mscc,vsc7514-serdes"
-- #phy-cells : from the generic phy bindings, must be 2.
- The first number defines the input port to use for a given
- SerDes macro. The second defines the macro to use. They are
- defined in dt-bindings/phy/phy-ocelot-serdes.h
-
-Example:
-
- serdes: serdes {
- compatible = "mscc,vsc7514-serdes";
- #phy-cells = <2>;
- };
-
- ethernet {
- port1 {
- phy-handle = <&phy_foo>;
- /* Link SERDES1G_5 to port1 */
- phys = <&serdes 1 SERDES1G_5>;
- };
- };