aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2018-12-25 13:47:41 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2018-12-25 13:47:41 -0800
commit1e2af254ef130e37d9fb3cb1bc9bfbf6ea184b4a (patch)
treeda653d3e38f54ed497d3fae7d7f223fdbedb4ac8 /Documentation/devicetree/bindings
parentMerge tag 'edac_for_4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp (diff)
parentMerge branches 'pm-devfreq', 'pm-avs' and 'pm-tools' (diff)
downloadlinux-dev-1e2af254ef130e37d9fb3cb1bc9bfbf6ea184b4a.tar.xz
linux-dev-1e2af254ef130e37d9fb3cb1bc9bfbf6ea184b4a.zip
Merge tag 'pm-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management updates from Rafael Wysocki: "These add sysadmin documentation for cpuidle, extend the cpuidle subsystem somewhat, improve the handling of performance states in the generic power domains (genpd) and operating performance points (OPP) frameworks, add a new cpufreq driver for Qualcomm SoCs, update some other cpufreq drivers, switch over the runtime PM framework to using high-res timers for device autosuspend, fix a problem with suspend-to-idle on ACPI-based platforms, add system-wide suspend and resume handling to the devfreq framework, do some janitorial cleanups all over and update some utilities. Specifics: - Add sysadmin documentation for cpuidle (Rafael Wysocki). - Make it possible to specify a cpuidle governor from kernel command line, add new cpuidle state sysfs attributes for governor evaluation, and improve the "polling" idle state handling (Rafael Wysocki). - Fix the handling of the "required-opps" DT property in the operating performance points (OPP) framework, improve the integration of it with the generic power domains (genpd) framework, improve the handling of performance states in them and clean up the idle states vs performance states separation in genpd (Viresh Kumar, Ulf Hansson). - Add a cpufreq driver called "qcom-hw" for Qualcomm SoCs using a hardware engine to control CPU frequency transitions along with DT bindings for it (Taniya Das). - Fix an intel_pstate driver issue related to CPU offline and update the documentation of it (Srinivas Pandruvada). - Clean up the imx6q cpufreq driver (Anson Huang). - Add SPDX license IDs to cpufreq schedutil governor files (Daniel Lezcano). - Switch over the runtime PM framework to using high-res timers for device autosuspend to allow the control of it to be more precise (Vincent Guittot). - Disable non-wakeup ACPI GPEs during suspend-to-idle so that they don't prevent the system from reaching the target low-power state and simplify the suspend-to-idle handling on ACPI platforms without full Low-Power S0 Idle (LPS0) support (Rafael Wysocki). - Add system-wide suspend and resume support to the devfreq framework (Lukasz Luba). - Clean up the SmartReflex adaptive voltage scaling (AVS) driver and add an SPDX license ID to it (Nishanth Menon, Uwe Kleine-K├Ânig, Thomas Meyer). - Get rid of code duplication by using the DEFINE_SHOW_ATTRIBUTE macro in some places, fix some DT node refcount leaks, and do some other janitorial cleanups (Yangtao Li). - Update the cpupower, intel_pstate_tracer and turbosat utilities (Abhishek Goel, Doug Smythies, Len Brown)" * tag 'pm-4.21-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (54 commits) PM / Domains: remove define_genpd_open_function() and define_genpd_debugfs_fops() PM-runtime: Switch autosuspend over to using hrtimers cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver dt-bindings: cpufreq: Introduce QCOM cpufreq firmware bindings ACPI: PM: Loop in full LPS0 mode only ACPI: EC / PM: Disable non-wakeup GPEs for suspend-to-idle tools/power/x86/intel_pstate_tracer: Fix non root execution for post processing a trace file tools/power turbostat: consolidate duplicate model numbers tools/power turbostat: fix goldmont C-state limit decoding PM / Domains: Propagate performance state updates PM / Domains: Factorize dev_pm_genpd_set_performance_state() PM / Domains: Save OPP table pointer in genpd OPP: Don't return 0 on error from of_get_required_opp_performance_state() OPP: Add dev_pm_opp_xlate_performance_state() helper OPP: Improve _find_table_of_opp_np() PM / Domains: Make genpd performance states orthogonal to the idlestates PM / sleep: convert to DEFINE_SHOW_ATTRIBUTE cpuidle: Add 'above' and 'below' idle state metrics PM / AVS: SmartReflex: Switch to SPDX Licence ID PM / AVS: SmartReflex: NULL check before some freeing functions is not needed ...
Diffstat (limited to 'Documentation/devicetree/bindings')
-rw-r--r--Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt172
1 files changed, 172 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt
new file mode 100644
index 000000000000..33856947c561
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt
@@ -0,0 +1,172 @@
+Qualcomm Technologies, Inc. CPUFREQ Bindings
+
+CPUFREQ HW is a hardware engine used by some Qualcomm Technologies, Inc. (QTI)
+SoCs to manage frequency in hardware. It is capable of controlling frequency
+for multiple clusters.
+
+Properties:
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: must be "qcom,cpufreq-hw".
+
+- clocks
+ Usage: required
+ Value type: <phandle> From common clock binding.
+ Definition: clock handle for XO clock and GPLL0 clock.
+
+- clock-names
+ Usage: required
+ Value type: <string> From common clock binding.
+ Definition: must be "xo", "alternate".
+
+- reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: Addresses and sizes for the memory of the HW bases in
+ each frequency domain.
+- reg-names
+ Usage: Optional
+ Value type: <string>
+ Definition: Frequency domain name i.e.
+ "freq-domain0", "freq-domain1".
+
+- #freq-domain-cells:
+ Usage: required.
+ Definition: Number of cells in a freqency domain specifier.
+
+* Property qcom,freq-domain
+Devices supporting freq-domain must set their "qcom,freq-domain" property with
+phandle to a cpufreq_hw followed by the Domain ID(0/1) in the CPU DT node.
+
+
+Example:
+
+Example 1: Dual-cluster, Quad-core per cluster. CPUs within a cluster switch
+DCVS state together.
+
+/ {
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ CPU0: cpu@0 {
+ device_type = "cpu";
+ compatible = "qcom,kryo385";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ next-level-cache = <&L2_0>;
+ qcom,freq-domain = <&cpufreq_hw 0>;
+ L2_0: l2-cache {
+ compatible = "cache";
+ next-level-cache = <&L3_0>;
+ L3_0: l3-cache {
+ compatible = "cache";
+ };
+ };
+ };
+
+ CPU1: cpu@100 {
+ device_type = "cpu";
+ compatible = "qcom,kryo385";
+ reg = <0x0 0x100>;
+ enable-method = "psci";
+ next-level-cache = <&L2_100>;
+ qcom,freq-domain = <&cpufreq_hw 0>;
+ L2_100: l2-cache {
+ compatible = "cache";
+ next-level-cache = <&L3_0>;
+ };
+ };
+
+ CPU2: cpu@200 {
+ device_type = "cpu";
+ compatible = "qcom,kryo385";
+ reg = <0x0 0x200>;
+ enable-method = "psci";
+ next-level-cache = <&L2_200>;
+ qcom,freq-domain = <&cpufreq_hw 0>;
+ L2_200: l2-cache {
+ compatible = "cache";
+ next-level-cache = <&L3_0>;
+ };
+ };
+
+ CPU3: cpu@300 {
+ device_type = "cpu";
+ compatible = "qcom,kryo385";
+ reg = <0x0 0x300>;
+ enable-method = "psci";
+ next-level-cache = <&L2_300>;
+ qcom,freq-domain = <&cpufreq_hw 0>;
+ L2_300: l2-cache {
+ compatible = "cache";
+ next-level-cache = <&L3_0>;
+ };
+ };
+
+ CPU4: cpu@400 {
+ device_type = "cpu";
+ compatible = "qcom,kryo385";
+ reg = <0x0 0x400>;
+ enable-method = "psci";
+ next-level-cache = <&L2_400>;
+ qcom,freq-domain = <&cpufreq_hw 1>;
+ L2_400: l2-cache {
+ compatible = "cache";
+ next-level-cache = <&L3_0>;
+ };
+ };
+
+ CPU5: cpu@500 {
+ device_type = "cpu";
+ compatible = "qcom,kryo385";
+ reg = <0x0 0x500>;
+ enable-method = "psci";
+ next-level-cache = <&L2_500>;
+ qcom,freq-domain = <&cpufreq_hw 1>;
+ L2_500: l2-cache {
+ compatible = "cache";
+ next-level-cache = <&L3_0>;
+ };
+ };
+
+ CPU6: cpu@600 {
+ device_type = "cpu";
+ compatible = "qcom,kryo385";
+ reg = <0x0 0x600>;
+ enable-method = "psci";
+ next-level-cache = <&L2_600>;
+ qcom,freq-domain = <&cpufreq_hw 1>;
+ L2_600: l2-cache {
+ compatible = "cache";
+ next-level-cache = <&L3_0>;
+ };
+ };
+
+ CPU7: cpu@700 {
+ device_type = "cpu";
+ compatible = "qcom,kryo385";
+ reg = <0x0 0x700>;
+ enable-method = "psci";
+ next-level-cache = <&L2_700>;
+ qcom,freq-domain = <&cpufreq_hw 1>;
+ L2_700: l2-cache {
+ compatible = "cache";
+ next-level-cache = <&L3_0>;
+ };
+ };
+ };
+
+ soc {
+ cpufreq_hw: cpufreq@17d43000 {
+ compatible = "qcom,cpufreq-hw";
+ reg = <0x17d43000 0x1400>, <0x17d45800 0x1400>;
+ reg-names = "freq-domain0", "freq-domain1";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
+ clock-names = "xo", "alternate";
+
+ #freq-domain-cells = <1>;
+ };
+}