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author | Imre Deak <imre.deak@intel.com> | 2015-03-10 21:18:30 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-04-16 09:20:15 +0200 |
commit | eee215660cedb4ee3c93de52a9bbc742891bb290 (patch) | |
tree | 6d818ae2383ba813ba8d01628cddc44c7fcaf956 /Documentation/xtensa | |
parent | drm/i915/bxt: add display initialize/uninitialize sequence (PHY) (diff) | |
download | linux-dev-eee215660cedb4ee3c93de52a9bbc742891bb290.tar.xz linux-dev-eee215660cedb4ee3c93de52a9bbc742891bb290.zip |
drm/i915/bxt: add description about the BXT PHYs
Extend the VLV/CHV DPIO (PHY) documentation with the BXT specifics.
v2:
- add more detail about the mapping between ports and transcoders (ville)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions