path: root/Documentation
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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-12 15:10:34 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-12 15:10:34 -0800
commit8d14066755592a2906b4f2378aeb5471b602d3cb (patch)
treec10ad6b6006d6e92c29e07777923cb9eb0db066c /Documentation
parentMerge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma (diff)
parentMerge branches 'arm/omap', 'arm/msm', 'arm/rockchip', 'arm/renesas', 'arm/smmu', 'x86/vt-d', 'x86/amd' and 'core' into next (diff)
Merge tag 'iommu-updates-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU updates from Joerg Roedel: "This time with: - A new IOMMU-API call: iommu_map_sg() to map multiple non-contiguous pages into an IO address space with only one API call. This allows certain optimizations in the IOMMU driver. - DMAR device hotplug in the Intel VT-d driver. It is now possible to hotplug the IOMMU itself. - A new IOMMU driver for the Rockchip ARM platform. - Couple of cleanups and improvements in the OMAP IOMMU driver. - Nesting support for the ARM-SMMU driver. - Various other small cleanups and improvements. Please note that this time some branches were also pulled into other trees, like the DRI and the Tegra tree. The VT-d branch was also pulled into tip/x86/apic. Some patches for the AMD IOMMUv2 driver are not in the IOMMU tree but were merged by Andrew (or finally ended up in the DRI tree)" * tag 'iommu-updates-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (42 commits) iommu: Decouple iommu_map_sg from CPU page size iommu/vt-d: Fix an off-by-one bug in __domain_mapping() pci, ACPI, iommu: Enhance pci_root to support DMAR device hotplug iommu/vt-d: Enhance intel-iommu driver to support DMAR unit hotplug iommu/vt-d: Enhance error recovery in function intel_enable_irq_remapping() iommu/vt-d: Enhance intel_irq_remapping driver to support DMAR unit hotplug iommu/vt-d: Search for ACPI _DSM method for DMAR hotplug iommu/vt-d: Implement DMAR unit hotplug framework iommu/vt-d: Dynamically allocate and free seq_id for DMAR units iommu/vt-d: Introduce helper function dmar_walk_resources() iommu/arm-smmu: add support for DOMAIN_ATTR_NESTING attribute iommu/arm-smmu: Play nice on non-ARM/SMMU systems iommu/amd: remove compiler warning due to IOMMU_CAP_NOEXEC iommu/arm-smmu: add IOMMU_CAP_NOEXEC to the ARM SMMU driver iommu: add capability IOMMU_CAP_NOEXEC iommu/arm-smmu: change IOMMU_EXEC to IOMMU_NOEXEC iommu/amd: Fix accounting of device_state x86/vt-d: Fix incorrect bit operations in setting values iommu/rockchip: Allow to compile with COMPILE_TEST iommu/ipmmu-vmsa: Return proper error if devm_request_irq fails ...
Diffstat (limited to 'Documentation')
1 files changed, 26 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
new file mode 100644
index 000000000000..9a55ac3735e5
--- /dev/null
+++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt
@@ -0,0 +1,26 @@
+Rockchip IOMMU
+A Rockchip DRM iommu translates io virtual addresses to physical addresses for
+its master device. Each slave device is bound to a single master device, and
+shares its clocks, power domain and irq.
+Required properties:
+- compatible : Should be "rockchip,iommu"
+- reg : Address space for the configuration registers
+- interrupts : Interrupt specifier for the IOMMU instance
+- interrupt-names : Interrupt name for the IOMMU instance
+- #iommu-cells : Should be <0>. This indicates the iommu is a
+ "single-master" device, and needs no additional information
+ to associate with its master device. See:
+ Documentation/devicetree/bindings/iommu/iommu.txt
+ vopl_mmu: iommu@ff940300 {
+ compatible = "rockchip,iommu";
+ reg = <0xff940300 0x100>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "vopl_mmu";
+ #iommu-cells = <0>;
+ };