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authorNicholas Piggin <npiggin@gmail.com>2018-11-05 10:35:12 +0800
committerLey Foon Tan <ley.foon.tan@intel.com>2019-03-07 05:29:35 +0800
commit3437d3c886ed07863acde923a627395abb177aa9 (patch)
treeaf1a7cb90e1689ec8fc31aa49cc7f501e5047997 /arch/.gitignore
parentnios2: pte_clear does not need to flush TLB (diff)
downloadlinux-dev-3437d3c886ed07863acde923a627395abb177aa9.tar.xz
linux-dev-3437d3c886ed07863acde923a627395abb177aa9.zip
nios2: Use an invalid TLB entry address helper function
There is no need for complicated calculation for an invalid address that maps to the same TLB index as the entry to be invalidated. Using the TLB address plus the two top bits set puts the address into the kernel TLB bypass range and still maps to the same cache line. This is also a bug fix for flush_tlb_pid, which is currently unused, but does not set PTEADDR to invalid. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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