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authorEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>2017-08-15 21:13:54 +0300
committerVineet Gupta <vgupta@synopsys.com>2017-09-01 11:26:27 -0700
commit9ed68785f7f2b001a6911d64fbd10cfc6fa49b27 (patch)
tree57bf1ba37285d0a090eb52d24f15115f58d64e4f /arch/arc/mm/cache.c
parentARCv2: IOC: Tighten up the contraints (specifically base / size alignment) (diff)
downloadlinux-dev-9ed68785f7f2b001a6911d64fbd10cfc6fa49b27.tar.xz
linux-dev-9ed68785f7f2b001a6911d64fbd10cfc6fa49b27.zip
ARC: mm: Decouple RAM base address from kernel link address
[Needed for HSDK] Currently the first page of system (hence RAM base) is assumed to be @ CONFIG_LINUX_LINK_BASE, where kernel itself is linked. However is case of HSDK platform, for reasons explained in that patch, this is not true. kernel needs to be linked @ 0x9000_0000 while DDR is still wired at 0x8000_0000. To properly account for this 256M of RAM, we need to introduce a new option and base page frame accountiing off of it. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> [vgupta: renamed CONFIG_KERNEL_RAM_BASE_ADDRESS => CONFIG_LINUX_RAM_BASE : simplified changelog]
Diffstat (limited to '')
-rw-r--r--arch/arc/mm/cache.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c
index d68d36c15909..eee924dfffa6 100644
--- a/arch/arc/mm/cache.c
+++ b/arch/arc/mm/cache.c
@@ -1173,7 +1173,7 @@ noinline void __init arc_ioc_setup(void)
write_aux_reg(ARC_REG_IO_COH_AP0_SIZE, order_base_2(mem_sz >> 10) - 2);
/* for now assume kernel base is start of IOC aperture */
- ioc_base = CONFIG_LINUX_LINK_BASE;
+ ioc_base = CONFIG_LINUX_RAM_BASE;
if (ioc_base % mem_sz != 0)
panic("IOC Aperture start must be aligned to the size of the aperture");