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authorNoam Camus <noamca@mellanox.com>2017-05-28 09:52:03 +0300
committerVineet Gupta <vgupta@synopsys.com>2017-08-28 15:17:36 -0700
commit30b7af252e8fef6bf2fc311ca654c40bd0552220 (patch)
tree792121b86f7a4350bfd7f227206fc36578517216 /arch/arc
parentARC: [plat-eznps] typo fix at Kconfig (diff)
downloadlinux-dev-30b7af252e8fef6bf2fc311ca654c40bd0552220.tar.xz
linux-dev-30b7af252e8fef6bf2fc311ca654c40bd0552220.zip
ARC: [plat-eznps] Fix TLB Errata
Due to a HW bug in NPS400 we get from time to time false TLB miss. Workaround this by validating each miss. Signed-off-by: Noam Camus <noamca@mellanox.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to '')
-rw-r--r--arch/arc/mm/tlbex.S9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S
index b30e4e36bb00..0e1e47a67c73 100644
--- a/arch/arc/mm/tlbex.S
+++ b/arch/arc/mm/tlbex.S
@@ -274,6 +274,13 @@ ex_saved_reg1:
.macro COMMIT_ENTRY_TO_MMU
#if (CONFIG_ARC_MMU_VER < 4)
+#ifdef CONFIG_EZNPS_MTM_EXT
+ /* verify if entry for this vaddr+ASID already exists */
+ sr TLBProbe, [ARC_REG_TLBCOMMAND]
+ lr r0, [ARC_REG_TLBINDEX]
+ bbit0 r0, 31, 88f
+#endif
+
/* Get free TLB slot: Set = computed from vaddr, way = random */
sr TLBGetIndex, [ARC_REG_TLBCOMMAND]
@@ -287,6 +294,8 @@ ex_saved_reg1:
#else
sr TLBInsertEntry, [ARC_REG_TLBCOMMAND]
#endif
+
+88:
.endm