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authorArnd Bergmann <arnd@arndb.de>2019-02-15 15:29:18 +0100
committerArnd Bergmann <arnd@arndb.de>2019-02-15 15:30:32 +0100
commit2a434f2471fdd4b27856bb857d6bd548406a80f3 (patch)
tree2e9e5e957bd53be2d5467e133efc7f56def984f7 /arch/arm/boot/dts
parentMerge tag 'arm-soc/for-5.1/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt (diff)
parentARM: dts: lpc32xx: ea3250: beautify gpio keys children nodes (diff)
downloadlinux-dev-2a434f2471fdd4b27856bb857d6bd548406a80f3.tar.xz
linux-dev-2a434f2471fdd4b27856bb857d6bd548406a80f3.zip
Merge tag 'lpc32xx-dt-for-5.1' of https://github.com/vzapolskiy/linux-lpc32xx into arm/dt
ARM: lpc32xx: devicetree updates for v5.1 Here are the changes for ARM NXP LPC32xx and ARM NXP LPC18xx/LPC43xx devicetree files: * added dts file for MYIR Tech MYD-LPC4357 development board, * two missing properties are added to LPC32xx keypad controller device tree node, this fixes a long-standing problem with its initialization, * LPC32xx PL11x LCD controller device node got corrected properties, which allows to use it with a new PL11x DRM driver, * output voltage level on one of Phytec phyCORE-LPC3250 fixed regulators is corrected, the fix is needed to remove duplicating platform data, * Phytec phyCORE-LPC3250 board gets a description of a kit LCD panel, this completes setup of CLCD device tree node for the board, * added unit addresses to memory device nodes on EA and Phytec boards, * fixes of ordinary warnings in dts formatting like leading zeroes, unused address and size cell properties and so on. * tag 'lpc32xx-dt-for-5.1' of https://github.com/vzapolskiy/linux-lpc32xx: ARM: dts: lpc32xx: ea3250: beautify gpio keys children nodes ARM: dts: lpc32xx: ea3250: add unit address to memory device node ARM: dts: lpc32xx: phy3250: add unit address to memory device node ARM: dts: lpc32xx: phy3250: setup LCD controller to panel interface ARM: dts: lpc32xx: phy3250: remove regulators umbrella device node ARM: dts: lpc32xx: phy3250: fix SD card regulator voltage ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller clocks property ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller variant ARM: dts: lpc32xx: reparent keypad controller to SIC1 ARM: dts: lpc32xx: add required clocks property to keypad device node ARM: dts: Add DT for MYIR Tech MYD-LPC4357 Development Board ARM: dts: lpc32xx: Remove leading 0x and 0s from bindings notation ARM: dts: lpc435x: remove address and size cells from gpio-keys-polled nodes Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/Makefile3
-rw-r--r--arch/arm/boot/dts/lpc3250-ea3250.dts20
-rw-r--r--arch/arm/boot/dts/lpc3250-phy3250.dts87
-rw-r--r--arch/arm/boot/dts/lpc32xx.dtsi28
-rw-r--r--arch/arm/boot/dts/lpc4350-hitex-eval.dts2
-rw-r--r--arch/arm/boot/dts/lpc4357-ea4357-devkit.dts2
-rw-r--r--arch/arm/boot/dts/lpc4357-myd-lpc4357.dts619
7 files changed, 701 insertions, 60 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 32de83c23a4b..ced0ef311826 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -315,7 +315,8 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
dtb-$(CONFIG_ARCH_LPC18XX) += \
lpc4337-ciaa.dtb \
lpc4350-hitex-eval.dtb \
- lpc4357-ea4357-devkit.dtb
+ lpc4357-ea4357-devkit.dtb \
+ lpc4357-myd-lpc4357.dtb
dtb-$(CONFIG_ARCH_LPC32XX) += \
lpc3250-ea3250.dtb \
lpc3250-phy3250.dtb
diff --git a/arch/arm/boot/dts/lpc3250-ea3250.dts b/arch/arm/boot/dts/lpc3250-ea3250.dts
index 58ea0a4e7afa..f46a11827ef6 100644
--- a/arch/arm/boot/dts/lpc3250-ea3250.dts
+++ b/arch/arm/boot/dts/lpc3250-ea3250.dts
@@ -17,64 +17,70 @@
/ {
model = "Embedded Artists LPC3250 board based on NXP LPC3250";
compatible = "ea,ea3250", "nxp,lpc3250";
- #address-cells = <1>;
- #size-cells = <1>;
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x4000000>;
};
- gpio_keys {
+ gpio-keys {
compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
autorepeat;
- button@21 {
+
+ button {
label = "Interrupt Key";
linux,code = <103>;
gpios = <&gpio 4 1 0>; /* GPI_P3 1 */
};
+
key1 {
label = "KEY1";
linux,code = <1>;
gpios = <&pca9532 0 0>;
};
+
key2 {
label = "KEY2";
linux,code = <2>;
gpios = <&pca9532 1 0>;
};
+
key3 {
label = "KEY3";
linux,code = <3>;
gpios = <&pca9532 2 0>;
};
+
key4 {
label = "KEY4";
linux,code = <4>;
gpios = <&pca9532 3 0>;
};
+
joy0 {
label = "Joystick Key 0";
linux,code = <10>;
gpios = <&gpio 2 0 0>; /* P2.0 */
};
+
joy1 {
label = "Joystick Key 1";
linux,code = <11>;
gpios = <&gpio 2 1 0>; /* P2.1 */
};
+
joy2 {
label = "Joystick Key 2";
linux,code = <12>;
gpios = <&gpio 2 2 0>; /* P2.2 */
};
+
joy3 {
label = "Joystick Key 3";
linux,code = <13>;
gpios = <&gpio 2 3 0>; /* P2.3 */
};
+
joy4 {
label = "Joystick Key 4";
linux,code = <14>;
diff --git a/arch/arm/boot/dts/lpc3250-phy3250.dts b/arch/arm/boot/dts/lpc3250-phy3250.dts
index 1e1c2f517a82..ebd19258e22b 100644
--- a/arch/arm/boot/dts/lpc3250-phy3250.dts
+++ b/arch/arm/boot/dts/lpc3250-phy3250.dts
@@ -1,6 +1,7 @@
/*
* PHYTEC phyCORE-LPC3250 board
*
+ * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
* Copyright 2012 Roland Stigge <stigge@antcom.de>
*
* The code contained herein is licensed under the GNU General Public
@@ -17,45 +18,12 @@
/ {
model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";
compatible = "phytec,phy3250", "nxp,lpc3250";
- #address-cells = <1>;
- #size-cells = <1>;
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x4000000>;
};
- regulators {
- backlight_reg: regulator@0 {
- compatible = "regulator-fixed";
- regulator-name = "backlight_reg";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- gpio = <&gpio 5 4 0>;
- enable-active-high;
- regulator-boot-on;
- };
-
- lcd_reg: regulator@1 {
- compatible = "regulator-fixed";
- regulator-name = "lcd_reg";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- gpio = <&gpio 5 0 0>;
- enable-active-high;
- regulator-boot-on;
- };
-
- sd_reg: regulator@2 {
- compatible = "regulator-fixed";
- regulator-name = "sd_reg";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- gpio = <&gpio 5 5 0>;
- enable-active-high;
- };
- };
-
leds {
compatible = "gpio-leds";
@@ -69,10 +37,59 @@
linux,default-trigger = "heartbeat";
};
};
+
+ panel: panel {
+ compatible = "sharp,lq035q7db03";
+ power-supply = <&reg_lcd>;
+
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&cldc_output>;
+ };
+ };
+ };
+
+ reg_backlight: regulator-backlight {
+ compatible = "regulator-fixed";
+ regulator-name = "backlight";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ gpio = <&gpio 5 4 0>;
+ enable-active-high;
+ regulator-boot-on;
+ };
+
+ reg_lcd: regulator-lcd {
+ compatible = "regulator-fixed";
+ regulator-name = "lcd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ gpio = <&gpio 5 0 0>;
+ enable-active-high;
+ regulator-boot-on;
+ };
+
+ reg_sd: regulator-sd {
+ compatible = "regulator-fixed";
+ regulator-name = "sd";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio 5 5 0>;
+ enable-active-high;
+ regulator-boot-on;
+ };
};
&clcd {
+ max-memory-bandwidth = <18710000>;
status = "okay";
+
+ port {
+ cldc_output: endpoint {
+ remote-endpoint = <&panel_input>;
+ arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
+ };
+ };
};
&i2c1 {
@@ -130,7 +147,7 @@
cd-gpios = <&gpio 3 1 0>;
cd-inverted;
bus-width = <4>;
- vmmc-supply = <&sd_reg>;
+ vmmc-supply = <&reg_sd>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index 44b468e4c37a..20b38f4ade37 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -139,11 +139,11 @@
};
clcd: clcd@31040000 {
- compatible = "arm,pl110", "arm,primecell";
+ compatible = "arm,pl111", "arm,primecell";
reg = <0x31040000 0x1000>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk LPC32XX_CLK_LCD>;
- clock-names = "apb_pclk";
+ clocks = <&clk LPC32XX_CLK_LCD>, <&clk LPC32XX_CLK_LCD>;
+ clock-names = "clcdclk", "apb_pclk";
status = "disabled";
};
@@ -230,7 +230,7 @@
status = "disabled";
};
- i2s1: i2s@2009C000 {
+ i2s1: i2s@2009c000 {
compatible = "nxp,lpc3220-i2s";
reg = <0x2009C000 0x1000>;
};
@@ -273,7 +273,7 @@
status = "disabled";
};
- i2c1: i2c@400A0000 {
+ i2c1: i2c@400a0000 {
compatible = "nxp,pnx-i2c";
reg = <0x400A0000 0x100>;
interrupt-parent = <&sic1>;
@@ -284,7 +284,7 @@
clocks = <&clk LPC32XX_CLK_I2C1>;
};
- i2c2: i2c@400A8000 {
+ i2c2: i2c@400a8000 {
compatible = "nxp,pnx-i2c";
reg = <0x400A8000 0x100>;
interrupt-parent = <&sic1>;
@@ -295,7 +295,7 @@
clocks = <&clk LPC32XX_CLK_I2C2>;
};
- mpwm: mpwm@400E8000 {
+ mpwm: mpwm@400e8000 {
compatible = "nxp,lpc3220-motor-pwm";
reg = <0x400E8000 0x78>;
status = "disabled";
@@ -394,7 +394,7 @@
#gpio-cells = <3>; /* bank, pin, flags */
};
- timer4: timer@4002C000 {
+ timer4: timer@4002c000 {
compatible = "nxp,lpc3220-timer";
reg = <0x4002C000 0x1000>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
@@ -412,7 +412,7 @@
status = "disabled";
};
- watchdog: watchdog@4003C000 {
+ watchdog: watchdog@4003c000 {
compatible = "nxp,pnx4008-wdt";
reg = <0x4003C000 0x1000>;
clocks = <&clk LPC32XX_CLK_WDOG>;
@@ -451,7 +451,7 @@
status = "disabled";
};
- timer1: timer@4004C000 {
+ timer1: timer@4004c000 {
compatible = "nxp,lpc3220-timer";
reg = <0x4004C000 0x1000>;
interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
@@ -462,7 +462,9 @@
key: key@40050000 {
compatible = "nxp,lpc3220-key";
reg = <0x40050000 0x1000>;
- interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk LPC32XX_CLK_KEY>;
+ interrupt-parent = <&sic1>;
+ interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@@ -475,7 +477,7 @@
status = "disabled";
};
- pwm1: pwm@4005C000 {
+ pwm1: pwm@4005c000 {
compatible = "nxp,lpc3220-pwm";
reg = <0x4005C000 0x4>;
clocks = <&clk LPC32XX_CLK_PWM1>;
@@ -484,7 +486,7 @@
status = "disabled";
};
- pwm2: pwm@4005C004 {
+ pwm2: pwm@4005c004 {
compatible = "nxp,lpc3220-pwm";
reg = <0x4005C004 0x4>;
clocks = <&clk LPC32XX_CLK_PWM2>;
diff --git a/arch/arm/boot/dts/lpc4350-hitex-eval.dts b/arch/arm/boot/dts/lpc4350-hitex-eval.dts
index 8b973f537d3a..93d0c2e99e7c 100644
--- a/arch/arm/boot/dts/lpc4350-hitex-eval.dts
+++ b/arch/arm/boot/dts/lpc4350-hitex-eval.dts
@@ -40,8 +40,6 @@
pca_buttons {
compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
poll-interval = <100>;
autorepeat;
diff --git a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
index 02b23fa29d75..224f80a4a31d 100644
--- a/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
+++ b/arch/arm/boot/dts/lpc4357-ea4357-devkit.dts
@@ -57,8 +57,6 @@
compatible = "gpio-keys-polled";
pinctrl-names = "default";
pinctrl-0 = <&gpio_joystick_pins>;
- #address-cells = <1>;
- #size-cells = <0>;
poll-interval = <100>;
autorepeat;
diff --git a/arch/arm/boot/dts/lpc4357-myd-lpc4357.dts b/arch/arm/boot/dts/lpc4357-myd-lpc4357.dts
new file mode 100644
index 000000000000..1f84654df50c
--- /dev/null
+++ b/arch/arm/boot/dts/lpc4357-myd-lpc4357.dts
@@ -0,0 +1,619 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * MYIR Tech MYD-LPC4357 Development Board with 800x480 7" TFT panel
+ *
+ * Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
+ */
+
+/dts-v1/;
+
+#include "lpc18xx.dtsi"
+#include "lpc4357.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "MYIR Tech LPC4357 Development Board";
+ compatible = "myir,myd-lpc4357", "nxp,lpc4357";
+
+ chosen {
+ stdout-path = "serial3:115200n8";
+ };
+
+ memory@28000000 {
+ device_type = "memory";
+ reg = <0x28000000 0x2000000>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins>;
+
+ led1 {
+ gpios = <&gpio LPC_GPIO(6,15) GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led2 {
+ gpios = <&gpio LPC_GPIO(6,16) GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led3 {
+ gpios = <&gpio LPC_GPIO(6,17) GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led4 {
+ gpios = <&gpio LPC_GPIO(6,10) GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led5 {
+ gpios = <&gpio LPC_GPIO(7,14) GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+
+ led6 {
+ gpios = <&gpio LPC_GPIO(6,14) GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ };
+
+ panel: panel {
+ compatible = "innolux,at070tn92";
+
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&lcdc_output>;
+ };
+ };
+ };
+
+ vcc: vcc_fixed {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-supply";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vmmc: vmmc_fixed {
+ compatible = "regulator-fixed";
+ regulator-name = "vmmc-supply";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&pinctrl {
+ can0_pins: can0-pins {
+ can_rd_cfg {
+ pins = "p3_1";
+ function = "can0";
+ input-enable;
+ };
+
+ can_td_cfg {
+ pins = "p3_2";
+ function = "can0";
+ };
+ };
+
+ can1_pins: can1-pins {
+ can_rd_cfg {
+ pins = "pe_1";
+ function = "can1";
+ input-enable;
+ };
+
+ can_td_cfg {
+ pins = "pe_0";
+ function = "can1";
+ };
+ };
+
+ emc_pins: emc-pins {
+ emc_addr0_22_cfg {
+ pins = "p2_9", "p2_10", "p2_11", "p2_12",
+ "p2_13", "p1_0", "p1_1", "p1_2",
+ "p2_8", "p2_7", "p2_6", "p2_2",
+ "p2_1", "p2_0", "p6_8", "p6_7",
+ "pd_16", "pd_15", "pe_0", "pe_1",
+ "pe_2", "pe_3", "pe_4";
+ function = "emc";
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ emc_data0_15_cfg {
+ pins = "p1_7", "p1_8", "p1_9", "p1_10",
+ "p1_11", "p1_12", "p1_13", "p1_14",
+ "p5_4", "p5_5", "p5_6", "p5_7",
+ "p5_0", "p5_1", "p5_2", "p5_3";
+ function = "emc";
+ input-enable;
+ input-schmitt-disable;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ emc_we_oe_cfg {
+ pins = "p1_6", "p1_3";
+ function = "emc";
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ emc_cs0_cfg {
+ pins = "p1_5";
+ function = "emc";
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ emc_sdram_dqm0_1_cfg {
+ pins = "p6_12", "p6_10";
+ function = "emc";
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ emc_sdram_ras_cas_cfg {
+ pins = "p6_5", "p6_4";
+ function = "emc";
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ emc_sdram_dycs0_cfg {
+ pins = "p6_9";
+ function = "emc";
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ emc_sdram_cke_cfg {
+ pins = "p6_11";
+ function = "emc";
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ emc_sdram_clock_cfg {
+ pins = "clk0";
+ function = "emc";
+ input-enable;
+ input-schmitt-disable;
+ slew-rate = <1>;
+ bias-disable;
+ };
+ };
+
+ enet_rmii_pins: enet-rmii-pins {
+ enet_rmii_rxd_cfg {
+ pins = "p1_15", "p0_0";
+ function = "enet";
+ input-enable;
+ input-schmitt-disable;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ enet_rmii_txd_cfg {
+ pins = "p1_18", "p1_20";
+ function = "enet";
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ enet_rmii_rx_dv_cfg {
+ pins = "p1_16";
+ function = "enet";
+ input-enable;
+ input-schmitt-disable;
+ bias-disable;
+ };
+
+ enet_mdio_cfg {
+ pins = "p1_17";
+ function = "enet";
+ input-enable;
+ input-schmitt-disable;
+ bias-disable;
+ };
+
+ enet_mdc_cfg {
+ pins = "pc_1";
+ function = "enet";
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ enet_rmii_tx_en_cfg {
+ pins = "p0_1";
+ function = "enet";
+ bias-disable;
+ };
+
+ enet_ref_clk_cfg {
+ pins = "p1_19";
+ function = "enet";
+ slew-rate = <1>;
+ input-enable;
+ input-schmitt-disable;
+ bias-disable;
+ };
+ };
+
+ i2c0_pins: i2c0-pins {
+ i2c0_pins_cfg {
+ pins = "i2c0_scl", "i2c0_sda";
+ function = "i2c0";
+ input-enable;
+ };
+ };
+
+ i2c1_pins: i2c1-pins {
+ i2c1_pins_cfg {
+ pins = "pe_15", "pe_13";
+ function = "i2c1";
+ input-enable;
+ };
+ };
+
+ lcd_pins: lcd-pins {
+ lcd_vd0_23_cfg {
+ pins = "p4_1", "p4_4", "p4_3", "p4_2",
+ "p8_7", "p8_6", "p8_5", "p8_4",
+ "p7_5", "p4_8", "p4_10", "p4_9",
+ "p8_3", "pb_6", "pb_5", "pb_4",
+ "p7_4", "p7_3", "p7_2", "p7_1",
+ "pb_3", "pb_2", "pb_1", "pb_0";
+ function = "lcd";
+ };
+
+ lcd_vsync_en_dclk_lp_pwr_cfg {
+ pins = "p4_5", "p4_6", "p4_7", "p7_6", "p7_7";
+ function = "lcd";
+ };
+ };
+
+ led_pins: led-pins {
+ led_1_6_cfg {
+ pins = "pd_1", "pd_2", "pd_3", "pc_11", "pe_14", "pd_0";
+ function = "gpio";
+ bias-pull-down;
+ };
+ };
+
+ sdmmc_pins: sdmmc-pins {
+ sdmmc_clk_cfg {
+ pins = "pc_0";
+ function = "sdmmc";
+ slew-rate = <1>;
+ bias-pull-down;
+ };
+
+ sdmmc_cmd_dat0_3_cfg {
+ pins = "pc_4", "pc_5", "pc_6", "pc_7", "pc_10";
+ function = "sdmmc";
+ input-enable;
+ input-schmitt-disable;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ sdmmc_cd_cfg {
+ pins = "pc_8";
+ function = "sdmmc";
+ input-enable;
+ bias-pull-down;
+ };
+ };
+
+ spifi_pins: spifi-pins {
+ spifi_sck_cfg {
+ pins = "p3_3";
+ function = "spifi";
+ input-enable;
+ input-schmitt-disable;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ spifi_mosi_miso_sio2_sio3_cfg {
+ pins = "p3_7", "p3_6", "p3_5", "p3_4";
+ function = "spifi";
+ input-enable;
+ input-schmitt-disable;
+ slew-rate = <1>;
+ bias-disable;
+ };
+
+ spifi_cs_cfg {
+ pins = "p3_8";
+ function = "spifi";
+ bias-disable;
+ };
+ };
+
+ ssp1_pins: ssp1-pins {
+ ssp1_sck_cfg {
+ pins = "pf_4";
+ function = "ssp1";
+ slew-rate = <1>;
+ bias-pull-down;
+ };
+
+ ssp1_miso_cfg {
+ pins = "pf_6";
+ function = "ssp1";
+ input-enable;
+ input-schmitt-disable;
+ slew-rate = <1>;
+ bias-pull-down;
+ };
+
+ ssp1_mosi_cfg {
+ pins = "pf_7";
+ function = "ssp1";
+ slew-rate = <1>;
+ bias-pull-down;
+ };
+
+ ssp1_ssel_cfg {
+ pins = "pf_5";
+ function = "gpio";
+ bias-disable;
+ };
+ };
+
+ uart0_pins: uart0-pins {
+ uart0_rxd_cfg {
+ pins = "pf_11";
+ function = "uart0";
+ input-enable;
+ input-schmitt-disable;
+ bias-disable;
+ };
+
+ uart0_clk_dir_txd_cfg {
+ pins = "pf_8", "pf_9", "pf_10";
+ function = "uart0";
+ bias-pull-down;
+ };
+ };
+
+ uart1_pins: uart1-pins {
+ uart1_rxd_cfg {
+ pins = "pc_14";
+ function = "uart1";
+ bias-disable;
+ input-enable;
+ input-schmitt-disable;
+ };
+
+ uart1_dtr_txd_cfg {
+ pins = "pc_12", "pc_13";
+ function = "uart1";
+ bias-pull-down;
+ };
+ };
+
+ uart2_pins: uart2-pins {
+ uart2_rxd_cfg {
+ pins = "pa_2";
+ function = "uart2";
+ bias-disable;
+ input-enable;
+ input-schmitt-disable;
+ };
+
+ uart2_txd_cfg {
+ pins = "pa_1";
+ function = "uart2";
+ bias-pull-down;
+ };
+ };
+
+ uart3_pins: uart3-pins {
+ uart3_rx_cfg {
+ pins = "p2_4";
+ function = "uart3";
+ bias-disable;
+ input-enable;
+ input-schmitt-disable;
+ };
+
+ uart3_tx_cfg {
+ pins = "p2_3";
+ function = "uart3";
+ bias-pull-down;
+ };
+ };
+
+ usb0_pins: usb0-pins {
+ usb0_pwr_enable_cfg {
+ pins = "p6_3";
+ function = "usb0";
+ };
+
+ usb0_pwr_fault_cfg {
+ pins = "p8_0";
+ function = "usb0";
+ bias-disable;
+ input-enable;
+ };
+ };
+};
+
+&adc1 {
+ status = "okay";
+ vref-supply = <&vcc>;
+};
+
+&can0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&can0_pins>;
+};
+
+/* Pin conflict with EMC, muxed by JP5 and JP6 */
+&can1 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&can1_pins>;
+};
+
+&emc {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&emc_pins>;
+
+ cs0 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+
+ mpmc,cs = <0>;
+ mpmc,memory-width = <16>;
+ mpmc,byte-lane-low;
+ mpmc,write-enable-delay = <0>;
+ mpmc,output-enable-delay = <0>;
+ mpmc,read-access-delay = <70>;
+ mpmc,page-mode-read-delay = <70>;
+
+ /* SST/Microchip SST39VF1601 */
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0 0 0x400000>;
+ bank-width = <2>;
+ };
+ };
+};
+
+&enet_tx_clk {
+ clock-frequency = <50000000>;
+};
+
+&i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ clock-frequency = <400000>;
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ clock-frequency = <400000>;
+
+ sensor@49 {
+ compatible = "lm75";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c512";
+ reg = <0x50>;
+ };
+};
+
+&lcdc {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_pins>;
+
+ max-memory-bandwidth = <92240000>;
+
+ port {
+ lcdc_output: endpoint {
+ remote-endpoint = <&panel_input>;
+ arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
+ };
+ };
+};
+
+&mac {
+ status = "okay";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&enet_rmii_pins>;
+ phy-handle = <&phy1>;
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+};
+
+&mmcsd {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_pins>;
+ bus-width = <4>;
+ vmmc-supply = <&vmmc>;
+};
+
+/* Pin conflict with SSP0, the latter is routed to J17 pin header */
+&spifi {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spifi_pins>;
+
+ /* Atmel AT25DF321A */
+ flash {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <51000000>;
+ spi-cpol;
+ spi-cpha;
+ };
+};
+
+&ssp1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&ssp1_pins>;
+ num-cs = <1>;
+ cs-gpios = <&gpio LPC_GPIO(7,19) GPIO_ACTIVE_LOW>;
+};
+
+/* Routed to J17 pin header */
+&uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+};
+
+/* RS485 */
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+};
+
+/* Routed to J17 pin header */
+&uart2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+};
+
+&uart3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+};
+
+&usb0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb0_pins>;
+};