diff options
| author |   Russell King <rmk@dyn-67.arm.linux.org.uk> | 2006-11-23 11:41:32 +0000 |
|---|---|---|
| committer |   Russell King <rmk+kernel@arm.linux.org.uk> | 2006-11-30 12:24:47 +0000 |
| commit | 10dd5ce28d78e2440e8fa1135d17e33399d75340 (patch) | |
| tree | d2e76765a57e7e47a9c424f99c3a22bf99c6da64 /arch/arm/mach-s3c2410/s3c2440-irq.c | |
| parent | [ARM] 3894/1: pxa27x: Update DCSR_EORINTR bit definition in DCSR (diff) | |
| download | linux-dev-10dd5ce28d78e2440e8fa1135d17e33399d75340.tar.xz linux-dev-10dd5ce28d78e2440e8fa1135d17e33399d75340.zip | |
[ARM] Remove compatibility layer for ARM irqs
set_irq_chipdata -> set_irq_chip_data
get_irq_chipdata -> get_irq_chip_data
do_level_IRQ -> handle_level_irq
do_edge_IRQ -> handle_edge_irq
do_simple_IRQ -> handle_simple_irq
irqdesc -> irq_desc
irqchip -> irq_chip
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2410/s3c2440-irq.c')
| -rw-r--r-- | arch/arm/mach-s3c2410/s3c2440-irq.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c index 39db0752d53b..1ba19b27ab05 100644 --- a/arch/arm/mach-s3c2410/s3c2440-irq.c +++ b/arch/arm/mach-s3c2410/s3c2440-irq.c @@ -42,10 +42,10 @@ /* WDT/AC97 */ static void s3c_irq_demux_wdtac97(unsigned int irq, - struct irqdesc *desc) + struct irq_desc *desc) { unsigned int subsrc, submsk; - struct irqdesc *mydesc; + struct irq_desc *mydesc; /* read the current pending interrupts, and the mask * for what it is available */ @@ -90,7 +90,7 @@ s3c_irq_wdtac97_ack(unsigned int irqno) s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13); } -static struct irqchip s3c_irq_wdtac97 = { +static struct irq_chip s3c_irq_wdtac97 = { .mask = s3c_irq_wdtac97_mask, .unmask = s3c_irq_wdtac97_unmask, .ack = s3c_irq_wdtac97_ack, @@ -105,12 +105,12 @@ static int s3c2440_irq_add(struct sys_device *sysdev) /* add new chained handler for wdt, ac7 */ set_irq_chip(IRQ_WDT, &s3c_irq_level_chip); - set_irq_handler(IRQ_WDT, do_level_IRQ); + set_irq_handler(IRQ_WDT, handle_level_irq); set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97); for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) { set_irq_chip(irqno, &s3c_irq_wdtac97); - set_irq_handler(irqno, do_level_IRQ); + set_irq_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } |