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authorAnshuman Khandual <anshuman.khandual@arm.com>2018-09-20 09:36:20 +0530
committerCatalin Marinas <catalin.marinas@arm.com>2018-09-21 11:05:58 +0100
commit520ad98871a072471d2583a9386b9d7243fa584d (patch)
tree3de471ad1e8fe32b8d475bf33e800a3b3c6740b7 /arch/arm64/Kconfig
parentarm64/cpufeatures: Introduce ESR_ELx_SYS64_ISS_RT() (diff)
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arm64/cpufeatures: Factorize emulate_mrs()
MRS emulation gets triggered with exception class (0x00 or 0x18) eventually calling the function emulate_mrs() which fetches the user space instruction and analyses it's encodings (OP0, OP1, OP2, CRN, CRM, RT). The kernel tries to emulate the given instruction looking into the encoding details. Going forward these encodings can also be parsed from ESR_ELx.ISS fields without requiring to fetch/decode faulting userspace instruction which can improve performance. This factorizes emulate_mrs() function in a way that it can be called directly with MRS encodings (OP0, OP1, OP2, CRN, CRM) for any given target register which can then be used directly from 0x18 exception class. Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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