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authorWill Deacon <will.deacon@arm.com>2018-08-23 21:16:50 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2018-09-11 16:49:12 +0100
commitace8cb754539077ed75f3f15b77b2b51b5b7a431 (patch)
treebab41795267bc907a837e48799405ee489672604 /arch/arm64/Kconfig
parentarm64: tlb: Adjust stride and type of TLBI according to mmu_gather (diff)
downloadlinux-dev-ace8cb754539077ed75f3f15b77b2b51b5b7a431.tar.xz
linux-dev-ace8cb754539077ed75f3f15b77b2b51b5b7a431.zip
arm64: tlb: Avoid synchronous TLBIs when freeing page tables
By selecting HAVE_RCU_TABLE_INVALIDATE, we can rely on tlb_flush() being called if we fail to batch table pages for freeing. This in turn allows us to postpone walk-cache invalidation until tlb_finish_mmu(), which avoids lots of unnecessary DSBs and means we can shoot down the ASID if the range is large enough. Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to '')
-rw-r--r--arch/arm64/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index b4c1f1f55aec..58eb02796b16 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -143,6 +143,7 @@ config ARM64
select HAVE_PERF_USER_STACK_DUMP
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_RCU_TABLE_FREE
+ select HAVE_RCU_TABLE_INVALIDATE
select HAVE_RSEQ
select HAVE_STACKPROTECTOR
select HAVE_SYSCALL_TRACEPOINTS