path: root/arch/arm64/boot/dts/qcom/qcs404.dtsi
diff options
authorSumit Garg <sumit.garg@linaro.org>2022-07-11 14:00:38 +0530
committerBjorn Andersson <bjorn.andersson@linaro.org>2022-07-16 10:18:15 -0500
commit58577966a42fc0b660b5e2c7c9e5a2241363ea83 (patch)
tree5baa40a8c8d5e044f93cf6aeeb52c1f076587353 /arch/arm64/boot/dts/qcom/qcs404.dtsi
parentarm64: dts: qcom: sc7280: drop unused clocks from eDP node (diff)
arm64: dts: qcom: qcs404: Fix incorrect USB2 PHYs assignment
Currently the DT for QCS404 SoC has setup for 2 USB2 PHYs with one each assigned to USB3 controller and USB2 controller. This assignment is incorrect which only works by luck: as when each USB HCI comes up it configures the *other* controllers PHY which is enough to make them happy. If, for any reason, we were to disable one of the controllers then both would stop working. This was a difficult inconsistency to be caught which was found while trying to enable USB support in u-boot. So with all the required drivers ported to u-boot, I couldn't get the same USB storage device enumerated in u-boot which was being enumerated fine by the kernel. The root cause of the problem came out to be that I wasn't enabling USB2 PHY: "usb2_phy_prim" in u-boot. Then I realised that via simply disabling the same USB2 PHY currently assigned to USB2 host controller in the kernel disabled enumeration for USB3 host controller as well. So fix this inconsistency by correctly assigning USB2 PHYs. Fixes: 9375e7d719b3 ("arm64: dts: qcom: qcs404: Add USB devices and PHYs") Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220711083038.1518529-1-sumit.garg@linaro.org
Diffstat (limited to '')
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 19fd8a2b551e..9ab990061522 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -548,7 +548,7 @@
compatible = "snps,dwc3";
reg = <0x07580000 0xcd00>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb2_phy_sec>, <&usb3_phy>;
+ phys = <&usb2_phy_prim>, <&usb3_phy>;
phy-names = "usb2-phy", "usb3-phy";
snps,hird-threshold = /bits/ 8 <0x10>;
@@ -577,7 +577,7 @@
compatible = "snps,dwc3";
reg = <0x078c0000 0xcc00>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb2_phy_prim>;
+ phys = <&usb2_phy_sec>;
phy-names = "usb2-phy";
snps,hird-threshold = /bits/ 8 <0x10>;