aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
diff options
context:
space:
mode:
authorJohan Hovold <johan+linaro@kernel.org>2022-07-15 09:02:46 +0200
committerBjorn Andersson <bjorn.andersson@linaro.org>2022-07-16 21:30:12 -0500
commit0bd6b33c51e916e1e6cae113a48ec3c8d897d3ac (patch)
tree3876dfb10b18a644fcf51afc6db94218a93bea59 /arch/arm64/boot/dts/qcom/sc8280xp.dtsi
parentarm64: dts: qcom: sc8280xp: fix USB clock order and naming (diff)
downloadlinux-dev-0bd6b33c51e916e1e6cae113a48ec3c8d897d3ac.tar.xz
linux-dev-0bd6b33c51e916e1e6cae113a48ec3c8d897d3ac.zip
arm64: dts: qcom: sc8280xp: fix USB interrupts
The two single-port SC8280XP USB controllers do not have an hs_phy_irq interrupt. Instead they have a pwr_event interrupt which is distinct from the former and not yet supported by the driver. Fix the USB node interrupt names so that they match the devicetree binding. Also fix the pwr_event interrupt of the second controller which should be 811 as noticed by Andrew Halaney. Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220715070248.19078-3-johan+linaro@kernel.org
Diffstat (limited to '')
-rw-r--r--arch/arm64/boot/dts/qcom/sc8280xp.dtsi14
1 files changed, 9 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index c33c9aedcc05..12267feb2fc5 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -1296,8 +1296,10 @@
<&pdc 14 IRQ_TYPE_EDGE_BOTH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
<&pdc 138 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
- "dm_hs_phy_irq", "ss_phy_irq";
+ interrupt-names = "pwr_event",
+ "dp_hs_phy_irq",
+ "dm_hs_phy_irq",
+ "ss_phy_irq";
power-domains = <&gcc USB30_PRIM_GDSC>;
@@ -1342,12 +1344,14 @@
<&gcc GCC_USB30_SEC_MASTER_CLK>;
assigned-clock-rates = <19200000>, <200000000>;
- interrupts-extended = <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 12 IRQ_TYPE_EDGE_BOTH>,
<&pdc 13 IRQ_TYPE_EDGE_BOTH>,
<&pdc 136 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
- "dm_hs_phy_irq", "ss_phy_irq";
+ interrupt-names = "pwr_event",
+ "dp_hs_phy_irq",
+ "dm_hs_phy_irq",
+ "ss_phy_irq";
power-domains = <&gcc USB30_SEC_GDSC>;