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authorJohan Hovold <johan+linaro@kernel.org>2022-07-15 09:02:45 +0200
committerBjorn Andersson <bjorn.andersson@linaro.org>2022-07-16 21:30:12 -0500
commit68af5d7c6d6dae12be6bb4fb52aabe8e1b7a2fe0 (patch)
tree1e8c9335aab4fc969fbe61ff1b08667c99d35e55 /arch/arm64/boot/dts/qcom/sc8280xp.dtsi
parentarm64: dts: qcom: sc8280xp: fix usb_1 ssphy irq (diff)
downloadlinux-dev-68af5d7c6d6dae12be6bb4fb52aabe8e1b7a2fe0.tar.xz
linux-dev-68af5d7c6d6dae12be6bb4fb52aabe8e1b7a2fe0.zip
arm64: dts: qcom: sc8280xp: fix USB clock order and naming
Fix the USB controller clock order and naming so that they match the devicetree binding. Note that the driver currently simply enables all clocks in the order that they are specified in the devicetree. Reordering the clocks as per the binding means that the only explicit ordering constraint found in the vendor driver, that cfg_noc should be enabled before the core_clk, is now honoured. Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220715070248.19078-2-johan+linaro@kernel.org
Diffstat (limited to '')
-rw-r--r--arch/arm64/boot/dts/qcom/sc8280xp.dtsi16
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index dd6e0e845029..c33c9aedcc05 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -1276,16 +1276,16 @@
#size-cells = <2>;
ranges;
- clocks = <&gcc GCC_USB30_PRIM_MASTER_CLK>,
- <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
+ clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
+ <&gcc GCC_USB30_PRIM_MASTER_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
- <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_PRIM_SLEEP_CLK>,
+ <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK>,
<&gcc GCC_SYS_NOC_USB_AXI_CLK>;
- clock-names = "core", "iface", "bus_aggr", "utmi", "sleep",
+ clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi",
"noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys";
assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
@@ -1326,16 +1326,16 @@
#size-cells = <2>;
ranges;
- clocks = <&gcc GCC_USB30_SEC_MASTER_CLK>,
- <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
+ clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
+ <&gcc GCC_USB30_SEC_MASTER_CLK>,
<&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,
- <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_SEC_SLEEP_CLK>,
+ <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK>,
<&gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK>,
<&gcc GCC_SYS_NOC_USB_AXI_CLK>;
- clock-names = "core", "iface", "bus_aggr", "utmi", "sleep",
+ clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi",
"noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys";
assigned-clocks = <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,