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| author |   Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2021-08-03 13:16:56 +0300 |
|---|---|---|
| committer |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-08-05 10:27:34 -0500 |
| commit | 111c52854102983f2260eb819ab9326084a004d7 (patch) | |
| tree | 43d87c13dc7b8e6e5699b6219803abf114d4e876 /arch/arm64/boot/dts/qcom/sdm845.dtsi | |
| parent | arm64: dts: qcom: sm8350: Add wakeup-parent to tlmm (diff) | |
| download | linux-dev-111c52854102983f2260eb819ab9326084a004d7.tar.xz linux-dev-111c52854102983f2260eb819ab9326084a004d7.zip | |
arm64: dts: qcom: sdm845: move bus clock to mdp node for sdm845 target
Move the bus clock to mdp device node,in order to facilitate bus band
width scaling on sdm845 target.
The parent device MDSS will not vote for bus bw, instead the vote will
be triggered by mdp device node. Since a minimum vote is required to
turn on bus clock, move the clock node to mdp device from where the
votes are requested.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210803101657.1072358-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 49624eadce84..6bd05f62bb05 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -4143,9 +4143,8 @@ power-domains = <&dispcc MDSS_GDSC>; clocks = <&gcc GCC_DISP_AHB_CLK>, - <&gcc GCC_DISP_AXI_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK>; - clock-names = "iface", "bus", "core"; + clock-names = "iface", "core"; assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>; assigned-clock-rates = <300000000>; @@ -4173,11 +4172,12 @@ <0 0x0aeb0000 0 0x2008>; reg-names = "mdp", "vbif"; - clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, + clocks = <&gcc GCC_DISP_AXI_CLK>, + <&dispcc DISP_CC_MDSS_AHB_CLK>, <&dispcc DISP_CC_MDSS_AXI_CLK>, <&dispcc DISP_CC_MDSS_MDP_CLK>, <&dispcc DISP_CC_MDSS_VSYNC_CLK>; - clock-names = "iface", "bus", "core", "vsync"; + clock-names = "gcc-bus", "iface", "bus", "core", "vsync"; assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>, <&dispcc DISP_CC_MDSS_VSYNC_CLK>; |