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| author |   Bhupesh Sharma <bhupesh.sharma@linaro.org> | 2021-05-19 20:06:50 +0530 |
|---|---|---|
| committer |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-09-13 10:35:10 -0500 |
| commit | eed1d9b6e36b06faa53c6dc74134ec21b1336d94 (patch) | |
| tree | eb8fa7cb36a4915d16dc3581ca2ff559651c7462 /arch/arm64/boot/dts/qcom/sdm845.dtsi | |
| parent | Linux 5.15-rc1 (diff) | |
| download | linux-dev-eed1d9b6e36b06faa53c6dc74134ec21b1336d94.tar.xz linux-dev-eed1d9b6e36b06faa53c6dc74134ec21b1336d94.zip | |
arm64: dts: qcom: sdm845: Use RPMH_CE_CLK macro directly
In commit 3e482859f1ef ("dts: qcom: sdm845: Add dt entries
to support crypto engine."), we decided to use the value indicated
by constant RPMH_CE_CLK rather than using it directly.
Now that the same RPMH clock value might be used for other
SoCs (in addition to sdm845), let's use the constant
RPMH_CE_CLK to make sure that this dtsi is compatible with the
other qcom ones.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
Link: https://lore.kernel.org/r/20210519143700.27392-8-bhupesh.sharma@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 6d7172e6f4c3..425f169b5d1e 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2311,7 +2311,7 @@ compatible = "qcom,bam-v1.7.0"; reg = <0 0x01dc4000 0 0x24000>; interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&rpmhcc 15>; + clocks = <&rpmhcc RPMH_CE_CLK>; clock-names = "bam_clk"; #dma-cells = <1>; qcom,ee = <0>; @@ -2327,7 +2327,7 @@ reg = <0 0x01dfa000 0 0x6000>; clocks = <&gcc GCC_CE1_AHB_CLK>, <&gcc GCC_CE1_AHB_CLK>, - <&rpmhcc 15>; + <&rpmhcc RPMH_CE_CLK>; clock-names = "iface", "bus", "core"; dmas = <&cryptobam 6>, <&cryptobam 7>; dma-names = "rx", "tx"; |