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authorMarc Zyngier <marc.zyngier@arm.com>2017-01-03 13:39:52 +0000
committerMarc Zyngier <marc.zyngier@arm.com>2017-08-31 15:31:36 +0100
commit3ca63f363f3f8fe457482c53d5c86d83bff21e64 (patch)
tree11268a0c171495eb884359b86e95b532123a575d /arch/arm64/include/asm/arch_gicv3.h
parentirqchip/gic-v3-its: Add VPE irq domain [de]activation (diff)
downloadlinux-dev-3ca63f363f3f8fe457482c53d5c86d83bff21e64.tar.xz
linux-dev-3ca63f363f3f8fe457482c53d5c86d83bff21e64.zip
irqchip/gic-v3-its: Add VPENDBASER/VPROPBASER accessors
V{PEND,PROP}BASER being 64bit registers, they need some ad-hoc accessors on 32bit, specially given that VPENDBASER contains a Valid bit, making the access a bit convoluted. Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to '')
-rw-r--r--arch/arm64/include/asm/arch_gicv3.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h
index 8cef47fa2218..0d2a53457c30 100644
--- a/arch/arm64/include/asm/arch_gicv3.h
+++ b/arch/arm64/include/asm/arch_gicv3.h
@@ -133,5 +133,10 @@ static inline void gic_write_bpr1(u32 val)
#define gicr_write_pendbaser(v, c) writeq_relaxed(v, c)
#define gicr_read_pendbaser(c) readq_relaxed(c)
+#define gits_write_vpropbaser(v, c) writeq_relaxed(v, c)
+
+#define gits_write_vpendbaser(v, c) writeq_relaxed(v, c)
+#define gits_read_vpendbaser(c) readq_relaxed(c)
+
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARCH_GICV3_H */