path: root/arch/arm64/include/asm/futex.h
diff options
authorWill Deacon <will.deacon@arm.com>2013-02-04 12:12:33 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2013-02-11 18:16:41 +0000
commit3a0310eb369aae985d6409d8ff1340146578e5c1 (patch)
tree8b1796a500d2dd694c924a57ee4502f31b15ef8b /arch/arm64/include/asm/futex.h
parentarm64: compat: use compat_uptr_t type for compat_ucontext.uc_link (diff)
arm64: atomics: fix grossly inconsistent asm constraints for exclusives
Our uses of inline asm constraints for atomic operations are fairly wild and varied. We basically need to guarantee the following: 1. Any instructions with barrier implications (load-acquire/store-release) have a "memory" clobber 2. When performing exclusive accesses, the addresing mode is generated using the "Q" constraint 3. Atomic blocks which use the condition flags, have a "cc" clobber This patch addresses these concerns which, as well as fixing the semantics of the code, stops GCC complaining about impossible asm constraints. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to '')
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/futex.h b/arch/arm64/include/asm/futex.h
index 3468ae8439fa..c582fa316366 100644
--- a/arch/arm64/include/asm/futex.h
+++ b/arch/arm64/include/asm/futex.h
@@ -39,7 +39,7 @@
" .popsection\n" \
: "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp) \
: "r" (oparg), "Ir" (-EFAULT) \
- : "cc")
+ : "cc", "memory")
static inline int
futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)