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| author |   Marc Zyngier <marc.zyngier@arm.com> | 2017-02-01 11:48:58 +0000 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2017-04-07 11:22:08 +0100 |
| commit | 6126ce0588eb5a0752d5c8b5796a7fca324fd887 (patch) | |
| tree | 7fc0666a03713243eac961d8899109686b12a628 /arch/arm64/kernel/traps.c | |
| parent | arm64: Allow checking of a CPU-local erratum (diff) | |
| download | linux-dev-6126ce0588eb5a0752d5c8b5796a7fca324fd887.tar.xz linux-dev-6126ce0588eb5a0752d5c8b5796a7fca324fd887.zip | |
arm64: Add CNTVCT_EL0 trap handler
Since people seem to make a point in breaking the userspace visible
counter, we have no choice but to trap the access. Add the required
handler.
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/kernel/traps.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index e52be6aa44ee..1de444e6c669 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -505,6 +505,14 @@ static void ctr_read_handler(unsigned int esr, struct pt_regs *regs) regs->pc += 4; } +static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs) +{ + int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT; + + pt_regs_write_reg(regs, rt, arch_counter_get_cntvct()); + regs->pc += 4; +} + struct sys64_hook { unsigned int esr_mask; unsigned int esr_val; @@ -523,6 +531,12 @@ static struct sys64_hook sys64_hooks[] = { .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ, .handler = ctr_read_handler, }, + { + /* Trap read access to CNTVCT_EL0 */ + .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK, + .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT, + .handler = cntvct_read_handler, + }, {}, }; |