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| author |   Oliver Upton <oliver.upton@linux.dev> | 2022-08-16 19:25:53 +0000 |
|---|---|---|
| committer |   Marc Zyngier <maz@kernel.org> | 2022-08-17 10:29:07 +0100 |
| commit | f3c6efc72f3b20ec23566e768979802f0a398f04 (patch) | |
| tree | c4baa4f8e27a21bbd86f4a67fbf4a126885ce6b3 /arch/arm64/kvm/sys_regs.c | |
| parent | KVM: arm64: Fix compile error due to sign extension (diff) | |
| download | linux-dev-f3c6efc72f3b20ec23566e768979802f0a398f04.tar.xz linux-dev-f3c6efc72f3b20ec23566e768979802f0a398f04.zip | |
KVM: arm64: Treat PMCR_EL1.LC as RES1 on asymmetric systems
KVM does not support AArch32 on asymmetric systems. To that end, enforce
AArch64-only behavior on PMCR_EL1.LC when on an asymmetric system.
Fixes: 2122a833316f ("arm64: Allow mismatched 32-bit EL0 support")
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220816192554.1455559-2-oliver.upton@linux.dev
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/kvm/sys_regs.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 333efddb1e27..3c4f5c9ac9f7 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -652,7 +652,7 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) */ val = ((pmcr & ~ARMV8_PMU_PMCR_MASK) | (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E); - if (!system_supports_32bit_el0()) + if (!kvm_supports_32bit_el0()) val |= ARMV8_PMU_PMCR_LC; __vcpu_sys_reg(vcpu, r->reg) = val; } @@ -701,7 +701,7 @@ static bool access_pmcr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, val = __vcpu_sys_reg(vcpu, PMCR_EL0); val &= ~ARMV8_PMU_PMCR_MASK; val |= p->regval & ARMV8_PMU_PMCR_MASK; - if (!system_supports_32bit_el0()) + if (!kvm_supports_32bit_el0()) val |= ARMV8_PMU_PMCR_LC; __vcpu_sys_reg(vcpu, PMCR_EL0) = val; kvm_pmu_handle_pmcr(vcpu, val); |