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| author |   Sibi Sankar <sibis@codeaurora.org> | 2020-08-01 18:00:49 +0530 |
|---|---|---|
| committer |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-09-15 23:44:34 +0000 |
| commit | 79a595bb92ea4b6bc33a704ad4db584c07c949ff (patch) | |
| tree | bbfff8f0865e20246c422dd7868a8fe94a633f78 /arch/arm64 | |
| parent | arm64: dts: qcom: sm8150: Add OSM L3 interconnect provider (diff) | |
| download | linux-dev-79a595bb92ea4b6bc33a704ad4db584c07c949ff.tar.xz linux-dev-79a595bb92ea4b6bc33a704ad4db584c07c949ff.zip | |
arm64: dts: qcom: sm8250: Add EPSS L3 interconnect provider
Add Epoch Subsystem (EPSS) L3 interconnect provider node on SM8250
SoCs.
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200801123049.32398-8-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8250.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 92f40b6d04e9..f49a4a1651e2 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/clock/qcom,gcc-sm8250.h> #include <dt-bindings/clock/qcom,gpucc-sm8250.h> #include <dt-bindings/clock/qcom,rpmh.h> +#include <dt-bindings/interconnect/qcom,osm-l3.h> #include <dt-bindings/mailbox/qcom-ipcc.h> #include <dt-bindings/power/qcom-aoss-qmp.h> #include <dt-bindings/power/qcom-rpmpd.h> @@ -2305,6 +2306,16 @@ compatible = "qcom,bcm-voter"; }; }; + + epss_l3: interconnect@18591000 { + compatible = "qcom,sm8250-epss-l3"; + reg = <0 0x18590000 0 0x1000>; + + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; + clock-names = "xo", "alternate"; + + #interconnect-cells = <1>; + }; }; timer { |