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| author |   Peter Geis <pgwipeout@gmail.com> | 2022-05-11 11:01:13 -0400 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2022-05-27 19:31:23 +0200 |
| commit | cd2d081d18de396cb45636c215dc589a330b3f4e (patch) | |
| tree | 8383cccbf786e4e02237c211dc9eb978358585fd /arch/arm64 | |
| parent | arm64: dts: rockchip: enable otg/drd operation of usb_host0_xhci in rk356x (diff) | |
| download | linux-dev-cd2d081d18de396cb45636c215dc589a330b3f4e.tar.xz linux-dev-cd2d081d18de396cb45636c215dc589a330b3f4e.zip | |
arm64: dts: rockchip: add clocks to rk356x cru
The rk356x cru requires a 24m clock input to function. Add the clocks
properties to the cru to clear some dtbs_check warnings.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220511150117.113070-3-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk356x.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 1042e68602de..914f13c0d399 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -397,6 +397,8 @@ cru: clock-controller@fdd20000 { compatible = "rockchip,rk3568-cru"; reg = <0x0 0xfdd20000 0x0 0x1000>; + clocks = <&xin24m>; + clock-names = "xin24m"; #clock-cells = <1>; #reset-cells = <1>; assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>; |