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authorMike Frysinger <michael.frysinger@analog.com>2007-10-11 00:22:35 +0800
committerBryan Wu <bryan.wu@analog.com>2007-10-11 00:22:35 +0800
commit168f1212c098727f2509fe0f66bd30d7209a8159 (patch)
treee749898e8ab56131a12d8fc489081321abb3ff2f /arch/blackfin/kernel
parentBlackfin arch: vmlinux.lds.S, break up our .init into separate sections (diff)
downloadlinux-dev-168f1212c098727f2509fe0f66bd30d7209a8159.tar.xz
linux-dev-168f1212c098727f2509fe0f66bd30d7209a8159.zip
Blackfin arch: rewrite our reboot code in C
rewrite our reboot code in C rather than assembly to be like other architectures and to allow board maintainers to define custom behavior Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Diffstat (limited to 'arch/blackfin/kernel')
-rw-r--r--arch/blackfin/kernel/Makefile2
-rw-r--r--arch/blackfin/kernel/bfin_gpio.c18
-rw-r--r--arch/blackfin/kernel/process.c25
3 files changed, 19 insertions, 26 deletions
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index f429ebc3a961..ae0a2203c3da 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -7,7 +7,7 @@ extra-y := init_task.o vmlinux.lds
obj-y := \
entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
sys_bfin.o time.o traps.o irqchip.o dma-mapping.o flat.o \
- fixed_code.o cplbinit.o cacheinit.o
+ fixed_code.o cplbinit.o cacheinit.o reboot.o
obj-$(CONFIG_BF53x) += bfin_gpio.o
obj-$(CONFIG_BF561) += bfin_gpio.o
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index 0182ce1fc4fb..d9284d7dc9fc 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
@@ -80,6 +80,7 @@
* GPIO_47 PH15 PF47
*/
+#include <linux/delay.h>
#include <linux/module.h>
#include <linux/err.h>
#include <asm/blackfin.h>
@@ -888,3 +889,20 @@ void gpio_direction_output(unsigned short gpio)
local_irq_restore(flags);
}
EXPORT_SYMBOL(gpio_direction_output);
+
+/* If we are booting from SPI and our board lacks a strong enough pull up,
+ * the core can reset and execute the bootrom faster than the resistor can
+ * pull the signal logically high. To work around this (common) error in
+ * board design, we explicitly set the pin back to GPIO mode, force /CS
+ * high, and wait for the electrons to do their thing.
+ *
+ * This function only makes sense to be called from reset code, but it
+ * lives here as we need to force all the GPIO states w/out going through
+ * BUG() checks and such.
+ */
+void bfin_gpio_reset_spi0_ssel1(void)
+{
+ port_setup(P_SPI0_SSEL1, GPIO_USAGE);
+ gpio_bankb[gpio_bank(P_SPI0_SSEL1)]->data_set = gpio_bit(P_SPI0_SSEL1);
+ udelay(1);
+}
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 22e790419868..de7d048bd4ee 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -134,31 +134,6 @@ void cpu_idle(void)
}
}
-void machine_restart(char *__unused)
-{
-#if defined(CONFIG_BFIN_ICACHE)
- bfin_write_IMEM_CONTROL(0x01);
- SSYNC();
-#endif
- bfin_reset();
- /* Dont do anything till the reset occurs */
- while (1) {
- SSYNC();
- }
-}
-
-void machine_halt(void)
-{
- for (;;)
- asm volatile ("idle");
-}
-
-void machine_power_off(void)
-{
- for (;;)
- asm volatile ("idle");
-}
-
void show_regs(struct pt_regs *regs)
{
printk(KERN_NOTICE "\n");